• International Journal of Precision Engineering and Manufacturing
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• 제7권1호
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• pp.13-17
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• 2006

Self-Assembled Monolayers (SAMs) formed by alkanethiol adsorption to thin metal film are widely being investigated for applications as coating layer for anti-stiction or friction reduction and in fabrication of micro structure of molecules and bio molecules. Recently, there have been many researches on micro patterning using the advantages of very thin thickness and etching resistance of Self-Assembled Monolayers in selective etching of thin metal film. In this report, we present the several machining method to form the nanoscale structure by Mask-Less laser patterning using alknanethiolate Self-Assembled Monolayers such as thin metal film etching and heterogeneous SAM structure formation.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.250-250
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• 2009

The fabricated the nanostructural patterns on the surface of SiN antireflection layer of polycrystalline Si solar cell using anodic aluminum oxide (AAO) masks in an inductively coupled plasma(ICP) etching process. The AAO nanopattern mask has the hole size of about 70~75nm and lattice constant of 100~120nm. The transferred nano-patterns were observed by the scanning electron microscope (SEM). The voltage of patterned Si solar cell enhanced.

• ETRI Journal
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• 제7권3호
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• pp.3-11
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• 1985

CAD tools that has the common data base system are important to design for the VLSI. Each CAD tools are used to design for the VLSI, and to reduce the complexity, man-error, design-time for the IC design. CIF, a layout description language, was proved to be effective in this point. In this article, the program which translates pattern generation data for the mask tooling into CIF data was described. This program has its character in the unification of physical design data base for a design automated CAD system. The output format of CIF data is fitting to the input of the kgraph that is graphic layout editor, and the name of each layer and the output file is extended as a user's option.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.419-420
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• 2009

The authors fabricated the nanostructural patterns on the surface of SiN antireflection layer of polycrystalline Si solar cell and the surface of crystalline Si wafer using anodic aluminum oxide (AAO) masks in an inductively coupled plasma(ICP) etching process. The AAO nanopattern mask has the hole size of about 70~80nm and an ave rage lattice constant of 100nm. The transferred nano-patterns were observed by the scanning electron microscope (SEM) and the enhancement of solar cell efficiency will be presented.

• 전기의세계
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• 제27권4호
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• pp.45-51
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• 1978

A new method of realizing the field effect transistor with a sub-.mu. channel width is described. The sub-.mu. channel width is made possible by etching grooves into n$^{+}$ pn$^{[-10]}$ n$^{[-10]}$ structure and using p region at the wall for the channel region of the Metal-Oxide-Semiconductor transistor (MOST), or by diffusing two different types of impurities through the same diffusion mask and using p region at the surface for the channel region of MOST. When the drain voltage is increased at the pn$^{[-10]}$ drainjunction the depletion layer extends into the n$^{[-10]}$ region instead of into p region; this is also the secret of success to realize the sub-.mu. channel width. As the result of the experimental fabrication, a microwave MOST was obtained. The cut-off frequency was calculated to be 15.4 GHz by Linvill's power equation using the measured capacitances and transconductance.

• 한국정밀공학회지
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• 제21권12호
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• pp.160-166
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• 2004

Self-Assembled Monolayers(SAMs) by alkanethiol adsorption to thin metal film are widely being investigated fer applications as coating layer for anti-stiction or friction reduction and in fabrication of micro structure of molecule and bio molecule. Recently, there have been many researches on micro patterning using the advantages of very thin thickness and etching resistance of Self-Assembled Monolayers in selective etching of thin metal film. In this report, we present the several machining method to form the nanoscale structure by Mask-Less laser patterning using alknanethiolate Self-Assembled Monolayers such as thin metal film etching and heterogeneous SAMs structure formation.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2004년도 추계학술대회 논문집
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• pp.351-354
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• 2004

This work presents a simple and cost-effective approach for maskless fabrication of positive-tone silicon master for the replica molding of hyperfine elastomeric channel. Positive-tone silicon masters were fabricated by a maskless fabrication technique using the combination of nanoscratch by Nanoindenter ⓡ XP and XOH wet etching. Grooves were machined on a silicon surface coated with native oxide by ductile-regime nanoscratch, and they were etched in a 20 wt％ KOH solution. After the KOH etching process, positive-tone structures resulted because of the etch-mask effect of the amorphous oxide layer generated by nanoscratch. The size and shape of the positive-tone structures were controlled by varying the etching time (5, 15, 18, 20, 25, 30 min) and the normal loads (1, 5 mN) during nanoscratch. Moreover, the effects of the Berkovich tip alignment (0, 45$^{\circ}$) on the deformation behavior and etching characteristic of silicon material were investigated.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2008년도 Techno-Fair 및 추계학술대회 논문집 전기물성,응용부문
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• pp.129-130
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• 2008

In this paper, optimal DRIE process conditions for fused quartz are experimentally determined by Taguchi method to develop high-performance inertial sensors based on the fused quartz material, which is known to have high Q-factors. Using Si layer as an etch mask, which was formed by previously developed bonding process of the fused quartz and Si wafer, fused quartz DRIE process was performed. Different 9 flow rate conditions of $C_4F_8$, $O_2$, He gas have been tested and the optimum combination of these factors was estimated. By this work, the ability to fabricate high aspect ratio fused quartz structure was confirmed.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1987년도 전기.전자공학 학술대회 논문집(II)
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• pp.1547-1550
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• 1987

This paper describes a new design rule checking system, PC-DRC, for CIF mask layout, which was written in C language on IBM PC/AT under DOS 3.0 environment. H/W devices and S/W utilities for PC-DRC is identical to that for PC-LADY[6], which makes PC-DRC an ideal post-processing routine for CIF file generated by PC-LADY. Various spurious errors were eliminated by ORing the input ClF data for each layer and the design rule errors were checked by edge based method on rectilinear polygon form. The detected errors are stored in CIF and displayed on CRT simultaneously.

• ETRI Journal
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• 제25권4호
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• pp.270-273
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• 2003

This paper presents a simple process to integrate thin-film inductors with a bottom NiFe magnetic core. NiFe thin films with a thickness of 2 to 3${\mu}m$ were deposited by sputtering. A polyimide buffer layer and shadow mask were used to relax the stress of the NiFe films. The fabricated double spiral thin-film inductor showed an inductance of 0.49${\mu}H$ and a Q factor of 4.8 at 8 MHz. The DC-DC converter with the monolithically integrated thin-film inductor showed comparable performances to those with sandwiched magnetic layers. We simplified the integration process by eliminating the planarization process for the top magnetic core. The efficiency of the DC-DC converter with the monolithic thin-film inductor was 72% when the input voltage and output voltage were 3.5 V and 6 V, respectively, at an operating frequency of 8 MHz.