• Title/Summary/Keyword: Mask Design

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An IP Subnet Address Calculation and Management method on VLSM (VLSM기반 IP 서브넷 주소 계산법 및 관리기법)

  • Cheon SeongKwon;Jin DongXue;Kim YoungRag;Kim ChongGun
    • The KIPS Transactions:PartC
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    • v.12C no.1 s.97
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    • pp.97-104
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    • 2005
  • One of the problems of the currently used IPv4 addressing-structure is the fact that there is a shortage of IP addresses and many addresses are being wasted, especially on sub-netting design. The variable subnet masking is a resolution to reduce IP address wasting. We propose an effective subnet W address calculation and management method on VLSM. Also, with the proposed subnet IP address management method, a web based subnet allocation and management system is introduced.

Process and Structure Design for High Power Reverse-Conducting Gate Commutated Thyristors (RC- GCTs) (고전압 역도통 Gate Commutated Thyristor (RC-GCT) 소자의 공정 및 구조 설계)

  • Kim, Sang-Cheol;Kim, Eun-Dong;Zhang, Chang-Li;Kim, Nam-Kyun;Baek, Do-Hyun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.1096-1099
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    • 2001
  • The basic design structure of RC-GCTs (Reserve-Conducting Gate-Commutated Thyristors) is firstly given in this paper. The bulk of wafer is punch-through (PT) type with high resistivity and narrow N-base width. The photo-mask was designed upon the turn-off characteristics of GCT and solution of separation between GCT and diode part. The center part of Si wafer is free-wheeling diode (FWD) and outer is GCT part which has 240 fingers totally. The switching performance of GCT was investigated by Dessis of ISE. The basic manufacture process of 2500V-4500V RC-GCTs was given in this work. Additionally, the local carrier lifetime control by 5Mev proton irradiation was adopted so as to not only to have the softness of reverse recovering for FWD but for reduction of turn-off losses of GCT as well.

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FPD 공정을 위한 램프하우스 열전달 특성 연구

  • Kim, Tae-An;Seo, Won-Ho;Kim, Jun-Hyeon;Kim, Yun-Je
    • Proceedings of the Korean Society Of Semiconductor Equipment Technology
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    • 2006.10a
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    • pp.132-137
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    • 2006
  • With the help of the development of digital-multimedia in the middle of 1990's, FDP(Flat Panel Display) had attracted considerable attention. Collimation proximity exposure system that transfers the pattern on wafer or glass exactly using mask and light with appropriate wavelength is core process in semiconductor and liquid display element. The performances of resolution required in precision exposure system are evaluated by resolving power, depth of focus and storage area. Most of development has targeted on these three factors. The optical design including lamp house has played an important role on the performance of exposure process. In this study, we evaluate the cooling system, concerning on exposure device with mercury lamp among the kernel equipment for the production of LCD, to prevent the instability of lighting due to long term accumulation of excessive heating inside the lamp house. Numerical analysis is conducted on full-scale model. The characteristics of three-dimensional flow, pressure and temperature distribution on exposure system are graphically depicted to estimate the whole cooling system for lamp house and to establish the design criteria.

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Design and Implementation of HPA for TVWS (TVWS용 전력증폭기 설계 및 구현)

  • Song, Ji-Hun;Kim, Jung-Hwan;Seol, Gwang-cheol;Yu, Ho Sang;Kang, Sanggee
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.05a
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    • pp.693-695
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    • 2015
  • The design and implementation of a broadband and linear HPA for TVWS are presented in this paper. The spectrum mask and transmitted power of HPAs for TVWS must be controlled and meet the regulations to minimize interference effects on the present broadcasting systems. The implemented HPA has the operating frequency of 470 ~ 698MHz with the maximum 48.63dB and minimum 43.45dB gain, input reflection coefficient of below -21.32dB, output reflection coefficient of below -4.29dB and the linearity of -45.24dBc at 28.79dBm output power.

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Low-Cost Design for Repair by Using Circuit Partitioning (회로 분할을 사용한 저비용 Repair 기술 연구)

  • Lee, Sung-Chul;Yeo, Dong-Hoon;Shin, Ju-Yong;Kim, Kyung-Ho;Shin, Hyun-Chul
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.5
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    • pp.48-55
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    • 2010
  • As the complexity and the clock speed of semiconductor integrated circuits increase, silicon validation becomes important. In this research, we developed new post-silicon repair & revision techniques to reduce cost and time-to-market. Spare cells are fabricated with the original design and are used for repair when necessary. The interconnections are modified by repair layer revision. The repair cost can be reduced by logic partitioning. Experimental results show that these techniques are effective for low-cost and fast turnaround repair.

Design Improvement and Measurement of a Rapid Single Flux Quantum Confluence Buffer

  • Baek, Seung-Hun;Kim, Jin-Young;Kim, Sehoon;Kang, Joonhee;Jungb, Ku-Rak;Park, Jong-Hyeok;Hahnb, Teak-Shang
    • Progress in Superconductivity and Cryogenics
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    • v.6 no.4
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    • pp.41-45
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    • 2004
  • Rapid Single flux quantum (RSFQ) confluence buffer is widely used in complex superconductive digital circuits. In this work, we have improved the currently used confluence buffer and obtained a more soundly designed confluence buffer. In simulations, improvements in the bias margins of 11 % and the global margins of 10%, compared to the previously used confluence buffer, were achieved. Global margins are very important in estimating a process error range allowed in fabrications. We used two circuit simulation tools, WRspice and Julia, to design and optimize the confluence buffer. We used Xic to obtain a mask layout. We fabricated the improved circuits by using Nb technology. The test results at low frequency showed that the improved confluence buffer operated correctly and had a very wide main bias margin of +/-43% enhanced from +/-26% of the previously used confluence buffer.

Implementation of a RF Transceiver for Sensor Nodes (센서노드용 RF송수신기의 구현)

  • Kang, Sang-Gee;Choi, Heung-Taek
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.6
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    • pp.1051-1057
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    • 2009
  • USN(Ubiquitous Sensor Network) is used to provide many services such as bridge monitoring, cultural properties monitoring, river monitoring, protection of an old and feeble person, management and control of a city and circumstance monitoring, etc. A RF transceiver is needed for implementing USN. In this paper the implementation and the design of a RF transceiver for sensor nodes operating in 2.4GHz frequency band are presented. The design procedure of AGC, a receiver and a transmitter is described. And the performance of the implemented RF transceiver is also tested. The test results of receiver sensitivity, receiver dynamic range, frequency stability, phase noise, output power of transmitter, flatness and spectrum mask are presented.

A Study on the Scenographic and Perspective Space in the Palladio's Architecture (팔라디오 건축의 씨노그래피적 공간과 투시도적 공간에 관한 연구)

  • Jeon, Young-Hoon
    • Korean Institute of Interior Design Journal
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    • v.15 no.2 s.55
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    • pp.3-12
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    • 2006
  • The renaissance architects had considered perspective system as accurate tool for the visual representation, but Palladio did not agree with this belief and demonstrated that it is a system based on optical illusionism. On the base of this faith, he created another optical illusion system can be called 'scenographic space'. But the remainder of his works reveals many perspective installations mobilized as well as it. In this context, this study aimed to analyze the meaning and usage of these two space composition systems in the Palladio's architecture. For the purpose of it, a preliminary study examine the background of his idea and make a comparative analysis between the two systems, and then finally analyze the concrete works in compliance with the building types. And then, this study comes to the following conclusion. The scenographic space create the cognition of discontinuity which was produced by the perceptual mask perpendicular to the subject's eye. In opposition to it, the perspective techniques join the space between the subject and his outer world. In result, the viewer lost or attach his attention on the connection between the real and the virtual, the secular and the divine, and the inside and the outside. Palladio applied these two illusion systems to all types of his architecture. By means of it, he could achieve the desire of his patrons and reconstruct the classical architecture of the late renaissance age.

Design and Analysis of 16 V N-TYPE MOSFET Transistor for the Output Resistance Improvement at Low Gate Bias (16 V 급 NMOSFET 소자의 낮은 게이트 전압 영역에서 출력저항 개선에 대한 연구)

  • Kim, Young-Mok;Lee, Han-Sin;Sung, Man-Young
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.21 no.2
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    • pp.104-110
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    • 2008
  • In this paper we proposed a new source-drain structure for N-type MOSFET which can suppress the output resistance reduction of a device in saturation region due to soft break down leakage at high drain voltage when the gate is biased around relatively low voltage. When a device is generally used as a switch at high gate bias the current level is very important for the operation. but in electronic circuit like an amplifier we should mainly consider the output resistance for the stable voltage gain and the operation at low gate bias. Hence with T-SUPREM simulator we designed devices that operate at low gate bias and high gate bias respectively without a extra photo mask layer and ion-implantation steps. As a result the soft break down leakage due to impact ionization is reduced remarkably and the output resistance increases about 3 times in the device that operates at the low gate bias. Also it is expected that electronic circuit designers can easily design a circuit using the offered N-type MOSFET device with the better output resistance.

Virtual Space Persona Expressed in Fashion Illustration (패션 디자인에 나타난 가상공간의 페르소나 표현)

  • Kim, Soon Ja
    • Fashion & Textile Research Journal
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    • v.15 no.5
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    • pp.671-681
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    • 2013
  • Persona means the mask of personality where the internal ego exposes itself to the outside. The complicated structure and diversity of contemporary society has provided men with a more variegated and diversified persona; in addition, advancements in internet and information communications creates the possibility for the emergence of more variegated and new persona. This study probes the persona of virtual space expressed in fashion designs; subsequently, this study reviews the concept and various characteristics of persona and examines the type of persona in the virtual space from the perspective of the manifestation of identity. The type of persona in the virtual space canbe categorized into flexible identity and falsified identity; subsequently, the characteristics and meanings of virtual space persona in fashion designs are analyzed. Flexible identity-oriented personas expressed in fashion designs are revealed through the images of animals or dolls. This is a childlike persona expression that expresses ego through other substances in an effort to express infantile substances such as dreams and fantasy cherished in childhood. Falsified identity-oriented personas are expanded as a realm of expression of the body and the realities are camouflaged as transformed persona. Negating existence itself by covering the eyes or face as well as the concealment of the body with masks or veils is an expression of a self-denying persona.