• Title/Summary/Keyword: Main Design Processing

Search Result 484, Processing Time 0.032 seconds

Design of Neural Network Controller Using RTDNN and FLC (RTDNN과 FLC를 사용한 신경망제어기 설계)

  • Shin, Wee-Jae
    • Journal of the Institute of Convergence Signal Processing
    • /
    • v.13 no.4
    • /
    • pp.233-237
    • /
    • 2012
  • In this paper, We propose a control system which compensate a output of a main Neual Network using a RTDNN(Recurrent Time Delayed Neural Network) with a FLC(Fuzzy Logic Controller)After a learn of main neural network, it can occur a Over shoot or Under shoot from a disturbance or a load variations. In order to adjust above case, we used the fuzzy compensator to get an expected results. And the weight of main neural network can be changed with the result of learning a inverse model neural network of plant, so a expected dynamic characteristics of plant can be got. We can confirm good response characteristics of proposed neural network controller by the results of simulation.

A Link Layer Design for DisplayPort Interface

  • Jin, Hyun-Bae;Yoon, Kwang-Hee;Kim, Tae-Ho;Jang, Ji-Hoon;Song, Byung-Cheol;Kang, Jin-Ku
    • Journal of IKEEE
    • /
    • v.14 no.4
    • /
    • pp.297-304
    • /
    • 2010
  • This paper presents a link layer design of DisplayPort interface with a state machine based on packet processing. The DisplayPort link layer provides isochronous video/audio transport service, link service, and device service. The merged video, audio main link, and AUX channel controller are implemented with 7,648 LUTs(Loop Up Tables), 6020 register, and 821,760 of block memory bits synthesized using a FPGA board and it operates at 203.32MHz.

Applications to Thin Film Processing to Solid Oxide Fuel Cells

  • Kim, Eui-Hyun;Hwang, Hee-Su;Ko, Myeong-Hee;Hwang, Jin-Ha
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2013.02a
    • /
    • pp.696-696
    • /
    • 2013
  • Solid Oxide Fuel Cells (SOFCs) have been gaining academic/industrial attention due to the unique high efficiency and minimized pollution emission. SOFCs are an electrochemical system composed of dissimilar materials which operates at relatively high temperatures ranging from 800 to 1000oC. The cell performance is critically dependent on the inherent properties and integration processing of the constituents, a cathode, an electrolyte, an anode, and an interconnect in addition to the sealing materials. In particular, the gas transport, ion transport, and by-product removal also affect the cell performance, in terms of open cell voltages, and cell powers. In particular, the polarization of cathode materials is one of the main sources which affects the overall function in SOFCs. Up to now, there have been studies on the materials design and microstructure design of the component materials. The current work reports the effect of thin film processing on cathode polarization in solid oxide fuel cells. The polarization issues are discussed in terms of dc- and ac-based electrical characterizations. The potential of thin film processing to the applicability to SOFCs is discussed.

  • PDF

High-Throughput Low-Complexity Successive-Cancellation Polar Decoder Architecture using One's Complement Scheme

  • Kim, Cheolho;Yun, Haram;Ajaz, Sabooh;Lee, Hanho
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.15 no.3
    • /
    • pp.427-435
    • /
    • 2015
  • This paper presents a high-throughput low-complexity decoder architecture and design technique to implement successive-cancellation (SC) polar decoding. A novel merged processing element with a one's complement scheme, a main frame with optimal internal word length, and optimized feedback part architecture are proposed. Generally, a polar decoder uses a two's complement scheme in merged processing elements, in which a conversion between two's complement and sign-magnitude requires an adder. However, the novel merged processing elements do not require an adder. Moreover, in order to reduce hardware complexity, optimized main frame and feedback part approaches are also presented. A (1024, 512) SC polar decoder was designed and implemented using 40-nm CMOS standard cell technology. Synthesis results show that the proposed SC polar decoder can lead to a 13% reduction in hardware complexity and a higher clock speed compared to conventional decoders.

Dynamical Polynomial Regression Prefetcher for DRAM-PCM Hybrid Main Memory (DRAM-PCM 하이브리드 메인 메모리에 대한 동적 다항식 회귀 프리페처)

  • Zhang, Mengzhao;Kim, Jung-Geun;Kim, Shin-Dug
    • Proceedings of the Korea Information Processing Society Conference
    • /
    • 2020.11a
    • /
    • pp.20-23
    • /
    • 2020
  • This research is to design an effective prefetching method required for DRAM-PCM hybrid main memory systems especially used for big data applications and massive-scale computing environment. Conventional prefetchers perform well with regular memory access patterns. However, workloads such as graph processing show extremely irregular memory access characteristics and thus could not be prefetched accurately. Therefore, this research proposes an efficient dynamical prefetching algorithm based on the regression method. We have designed an intelligent prefetch engine that can identify the characteristics of the memory access sequences. It can perform regular, linear regression or polynomial regression predictive analysis based on the memory access sequences' characteristics, and dynamically determine the number of pages required for prefetching. Besides, we also present a DRAM-PCM hybrid memory structure, which can reduce the energy cost and solve the conventional DRAM memory system's thermal problem. Experiment result shows that the performance has increased by 40%, compared with the conventional DRAM memory structure.

Design and Implementation of Real-Time Static Locking Protocol for Main-memory Database Systems (주기억장치 데이타베이스 시스템을 위한 실시간 정적 로킹 기법의 설계 및 구현)

  • Kim, Young-Chul;You, Han-Yang;Kim, Jin-Ho;Kim, June;Seo, Sang-Ku
    • Journal of KIISE:Databases
    • /
    • v.29 no.6
    • /
    • pp.464-476
    • /
    • 2002
  • Main-memory database systems which reside entire databases in main memory are suitable for high-performance real-time transaction processing. If two-phase locking(2PL) as concurrency control protocol is used for the transactions accessing main-memory databases, however, the possibility of lock conflict will be low but lock operations become relatively big overhead in total transaction processing time. In this paper, We designed a real-time static locking(RT-SL) protocol which minimizes lock operation overhead and reflects the priority of transactions and we implemented it on a main-memory real-time database system, Mr.RT. We also evaluate and compare its performance with the existing real-time locking protocols based on 2PL such as 2PL-PI and 2PL-HP. The extensive experiments reveal that our RT-SL outperforms the existing ones in most cases.

A Design and Implementation of Fault Tolerance Agent on Distributed Multimedia Environment (분산 멀티미디어 환경에서 결함 허용 에이전트의 설계 및 구현)

  • Go, Eung-Nam;Hwang, Dae-Jun
    • The Transactions of the Korea Information Processing Society
    • /
    • v.6 no.10
    • /
    • pp.2618-2629
    • /
    • 1999
  • In this paper, we describe the design and implementation of the FDRA(Fault Detection Recovery based on Agent) running on distributed multimedia environment. DOORAE is a good example for distributed multimedia and multimedia distance education system among students and teachers during lecture. It has primitive service agents. Service functions are implemented with objected oriented concept. FDRA is a multi-agent system. It has been environment, intelligent agents interact with each other, either collaboratively or non-collaboratively, to achieve their goals. The main idea is to detect an error by using polling method. This system detects an error by polling periodically the process with relation to session. And, it is to classify the type of error s automatically by using learning rules. The merit of this system is to use the same method to recovery it as it creates a session. FDRA is a system that is able to detect an error, to classify an error type, and to recover automatically a software error based on distributed multimedia environment.

  • PDF

A Design of MFB based Training System for Pigeon based Telemetry (MFB 제어 기반의 비둘기 학습제어 시스템의 설계)

  • Du, Xiao Huan;Kim, Seong Whan
    • Proceedings of the Korea Information Processing Society Conference
    • /
    • 2009.11a
    • /
    • pp.147-148
    • /
    • 2009
  • In this paper, we describe a telemetry stimulation system that controls animal-robots. In our system, we send the main control command from PC to the controller embedded in the pigeon based animal-robots. Once the controller receives the control signal, it makes biphasic stimulation pulses to medial forebrain bundle neurons to control the pigeon behavior as we want. We design the embedded controller using CUBLOC, which is lightweight for attaching on the pigeon.

Vehicle Multimedia Encapsulating Module Design using by Axiomatic Design Approach (공리적 설계기법을 이용한 차량용 멀티미디어 탑재 모듈의 기구설계)

  • Park, Jeong-Min;Lee, Jong-Soo
    • Proceedings of the KSME Conference
    • /
    • 2003.04a
    • /
    • pp.1205-1211
    • /
    • 2003
  • Having information is most important at the present age. Internet is main source of obtaining information and mobile telecommunication let people communicate each other without any time and space limitation. Recently, advanced technology in telecommunication makes two-way service possible. So, the mobile internet service combined internet with mobile telecommunication is widely and rapidly promoted. Therefore user can transmit and receive a lot of information without time and space restriction using various application technologies. This paper deals with machinery that makes human do office work conveniently in vehicle using mobile internet service. Namely, it tries to design mobile internet machinery combining of wireless payment, GPS module, mobile internet, and mobile office etc. And that can transmit and receive e-mail or documents etc. This machinery has various objects, and design process has complexity. To reduce trial error and processing complexity, Axiomatic Design Method is used to design the machinery.

  • PDF

A Study on the Process Planning and Die Design of Hot Forging for Axisymmetric Parts(I) (축대칭 부품에 대한 열간단조의 공정 및 금형설계에 관한 연구(I))

  • Choi, J.C.;Kim, B.M.;Kim, S.W.;Lee, J.S.;Hong, S.S.;Kim, N.H.
    • Transactions of Materials Processing
    • /
    • v.1 no.1
    • /
    • pp.20-32
    • /
    • 1992
  • This paper describes some research of Computer-Aided Process Planning and Die Design of Hot Forging for axisymmetric parts produced by the press. An approach to the system is based on knowledge based system. The system has been written in AutoLisp with personal computer. Knowledges for process planning & die design are extracted from the plasticity theories, handbooks, relevent references and empirical know-how of field experts in hot forging companies. The developed system is composed of five main modules, such as input module, process planning module, die design module, flow simulation module and output module which are used independently or in all. The final output is generated in graphic from. The developed system which aids designer provides powerful capabilities for process planning and die design of hot forging. This system also provides approximate flow pattern.

  • PDF