• Title/Summary/Keyword: MUX

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A Construction Theory of Multiple-Valued Logic Sequential Machines on $GF(2^M)$

  • 박춘명;김흥수
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.24 no.5
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    • pp.823-832
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    • 1987
  • This pper presents a method for constructing multiple-valued logic sequential machines based on Galois field. First, we assign all elements in GF(2**m) to bit codes using mathematical properties of GF(2**m). Then, we realized the sequencial machine circuits with and withoutm feed-back. 1) Sequential machines with feed-back are constructed by using only MUX from state-transition diagram expressing the information of sequential machines. 2) Sequential machines without feed-back are constructed by following steps. First, we assigned states in state-transition disgram to state bit codes, then obtained state function and predecessor table explaining the relationship between present states and previous states. Next, we obtained next-state function from state function and predecessor table. Finally we realized the circuit using MUX and decoder.

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Numerical Study to Design an Optical Node for Metropolitan Networks

  • Lee, Jong-Hyung
    • International Journal of Internet, Broadcasting and Communication
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    • v.11 no.4
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    • pp.43-48
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    • 2019
  • We design a reconfigurable optical node for metropolitan WDM networks, and numerically study the capability of the node in the optical signal level. Unlike a long-haul WDM system, major limitations of metropolitan WDM systems are power loss, fiber dispersion and optical signal-to-noise ratio(OSNR) degradation due to EDFAs. Therefore, we include the behaviors of transmitter and receiver, and fiber, EDFAs, and optical filters(MUX/DeMux) in numerical simulations with varying parameters over wide range. From simulation results, we can identify the maximum span numbers for OC-48 and OC-192 to achieve $BER<10^{-12}$ using the node structure at various received powers and residual dispersions.

Polarization Insensitive CWDM Optical Demultiplexer Based on Polarization Splitter-rotator and Delayed Interferometric Optical Filter

  • Seok-Hwan Jeong;Heuk Park;Joon Ki Lee
    • Current Optics and Photonics
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    • v.7 no.2
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    • pp.166-175
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    • 2023
  • We theoretically analyze and experimentally demonstrate a polarization-diversified four-channel optical demultiplexer (DeMUX) comprising a hybrid mode conversion-type polarization splitter rotator (PSR) and delayed Mach-Zehnder interferometer optical DeMUX for use in coarse wavelength division multiplexing (CWDM)-based optical interconnect applications. The Si wire-based device fabricated by a complementary metal-oxide semiconductor-compatible process exhibited nearly the same filter spectral response irrespective of the input polarization state under the PSR. The device had an extremely low insertion loss of <1.0 dB, polarization-dependent loss of <1.0 dB, and interchannel imbalance of <0.5 dB, suppressing unwanted wavelength and polarization crosstalk from neighboring channels of <-20 dB at each peak transmission channel grid.

A 1280-RGB $\times$ 800-Dot Driver based on 1:12 MUX for 16M-Color LTPS TFT-LCD Displays (16M-Color LTPS TFT-LCD 디스플레이 응용을 위한 1:12 MUX 기반의 1280-RGB $\times$ 800-Dot 드라이버)

  • Kim, Cha-Dong;Han, Jae-Yeol;Kim, Yong-Woo;Song, Nam-Jin;Ha, Min-Woo;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.1
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    • pp.98-106
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    • 2009
  • This work proposes a 1280-RGB $\times$ 800-Dot 70.78mW 0.l3um CMOS LCD driver IC (LDI) for high-performance 16M-color low temperature poly silicon (LTPS) thin film transistor liquid crystal display (TFT-LCD) systems such as ultra mobile PC (UMPC) and mobile applications simultaneously requiring high resolution, low power, and small size at high speed. The proposed LDI optimizes power consumption and chip area at high resolution based on a resistor-string based architecture. The single column driver employing a 1:12 MUX architecture drives 12 channels simultaneously to minimize chip area. The implemented class-AB amplifier achieves a rail-to-rail operation with high gain and low power while minimizing the effect of offset and output deviations for high definition. The supply- and temperature-insensitive current reference is implemented on chip with a small number of MOS transistors. A slew enhancement technique applicable to next-generation source drivers, not implemented on this prototype chip, is proposed to reduce power consumption further. The prototype LDI implemented in a 0.13um CMOS technology demonstrates a measured settling time of source driver amplifiers within 1.016us and 1.072us during high-to-low and low-to-high transitions, respectively. The output voltage of source drivers shows a maximum deviation of 11mV. The LDI with an active die area of $12,203um{\times}1500um$ consumes 70.78mW at 1.5V/5.5V.

TDX-1 교환기용 Custom IC 설계기술

  • Choe, Hae-Uk
    • ETRI Journal
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    • v.8 no.4
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    • pp.18-27
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    • 1986
  • 시스팀의 소형화, 성능향상, 비용절감, 신뢰성 향상, know-how 보존 등 경쟁력 강화에 필수적인 시스팀의 custom IC화 추세에 따라 당 연구소에서 개발된 TDX-1 교환기에 쓰이는 custom IC 2종 (MUX/DMX IC)의 설계기술 개발내용, 의의및 기대효과, 향후추진방향 등을 기술하였다.

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정보통신안테나

  • Korean Associaton of Information & Telecommunication
    • 정보화사회
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    • s.20
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    • pp.56-69
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    • 1989
  • 정보문화의 달이기도 했던 6월은 고도정보화사회를 앞당기는 일련의 획기적인 조치들이 취해져 관련업계의 관심을 크게 집중시키고 있다. 정부는 정보통신회선 사용상의 제한을 대폭 완화하여 민간기업이 실질적으로 VAN사업에 참여할 수 있는 길을 열어놨고 종래 규제일변도였던 전파정책을 권장행정으로 전환하는 전파관리법도 입법예고했다. 정부가 마련한 정보통신회선사용제도 개선조치는 DB, DP만 제공할 수 있도록 되어있는 정보통신역무제공업자의 사업범위를 불특정다수인을 대상으로 한 정보교환 및 타인통신매개행위를 허용했고 지금까지 9600bps급 이하의 저속회선에서만 접속이 허용되어온 다중화장치(MUX)의 사용범위를 대폭확대하여 64kbps급 이상의 고속회선에서도 접속사용할 수 있도록 허용했다. 또한 그룹 VAN의 경우에도 업무상 긴밀한 관계자 등만 이용할 수 있게 한 제한사항도 폐지해 국내 VAN시장에 대한 민간기업의 참여를 전면적으로 허용했다. 이외에도 정보통신역무제공업자가 DP.DB제공을 위해 필요한 경우 컴퓨터 본체에서의 부수적인 정보교환행위를 허용하여 DB내용 갱신(up-data) 등을 위한 중도컴퓨터의 접속도 가능토록 했다. 그런데 그룹 VAN의 경우 이용대상의 제한을 없앴으나 그룹망 중 타인사용특례를 받은 업체 이외의 망에는 이용자가 접속할 수 없도록 되어있기 때문에 각 업체에서는 시스템 통합화를 추진할 확률이 높다. 또한 고속회선에 대한 다중화장치(MUX) 사용을 허용하고 있으나 개방에 대비해 각 업체에서 이미 보유하고 있는 노드 프로세서(Node Processor)를 전용교환기로 간주, 이의 사용을 제한하고 있는 실정이다. 업계에서는 중도컴퓨터의 접속은 허용하고 있으면서 통신과 컴퓨터의 중간자적 기능을 갖고 있는 노드프로세서의 사용을제한한다는 데에 있어서는 의견을 달리하고 있다. 우리 협회에서는 이달 법제위원회를 개최하여 이번 조치에 대한 검토와 함께 전파관리법 입법예고안에 대한 업계의 의견을 수렴, 정부에 건의할 예정이다.

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A Study on the Behavioral technology Synthesis of VHDL for Testability (검사 용이화를 위한 VHDL의 동작기술 합성에 관한 연구)

  • Park, Jong-Tae;Choi, Hyun-Ho;Her, Hyong-Pal
    • Journal of the Institute of Electronics Engineers of Korea TE
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    • v.39 no.4
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    • pp.329-334
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    • 2002
  • For the testability, this paper proposed the algorithm at autonomous synthesis which includes the data path structure as the self testing as possible on high level synthesis method when VHDL, coding is used in the system design area. In the proposed algorithm of this paper, MUXs and registers are assigned to the data path of designed system. And the designed data path could be mapped the H/W specification of described VHDL coding to the testable library. As a results, it was mapped H/W to the assign algorithm that is minimized MUX and the registers in collision graph.

A Study on Optical internet Transmission technic Using DWDM based on network (네트워크 기반에서의 DWDM을 이용한 광 인터넷 전송 기술에 관한 연구)

  • 장우순;정진호
    • Journal of Internet Computing and Services
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    • v.2 no.1
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    • pp.87-96
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    • 2001
  • This article proposes traffic dispersion with optical transmission technical and development of transmission rate for the safe multicast computer communication in the high bandwidth, Recently multicast traffic such as distance conference or Internet broadcast increases therefore the importance of traffic dispersion and transmission rate is emphasized. Ultimately this article offers the way of carrying out the above suggestion, First this paper points out traffic problems occurred in voice and text centered transmission. Next, transmission rate can be controlled by optical transmission technic to solve above difficulties in the multimedia and Internet. We investigated the feature and output on Add-Drop Mux/Demux and Also presented charges of length accord each stage in interference. We can show, the best data of design as a result of this experiment.

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Efficient One-dimensional VLSI array using the Data reuse for Fractal Image Compression (데이터 재사용을 이용한 프랙탈 영상압축을 위한 효율적인 일차원 VLSI 어레이)

  • 이희진;이수진;우종호
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2001.05a
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    • pp.265-268
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    • 2001
  • In this paper, we designed one-dimensional VLSI array with high speed processing in Fractal image compression. fractal image compression algorithm partitions the original image into domain blocks and range blocks then compresses data using the self similarity of blocks. The image is partitioned into domain block with 50% overlapping. Domain block is reduced by averaging the original image to size of range block. VLSI array is trying to search the best matching between a range block and a large amount of domain blocks. Adjacent domain blocks are overlapped, so we can improve of each block's processing speed using the reuse of the overlapped data. In our experiment, proposed VLSI array has about 25% speed up by adding the least register, MUX, and DEMUX to the PE.

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