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A Study on the Behavioral technology Synthesis of VHDL for Testability  

Park, Jong-Tae (조선대학교 대학원 전자공학과)
Choi, Hyun-Ho (순천제일대학 전자정보통신학부)
Her, Hyong-Pal (순천제일대학 전자정보통신학부)
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Abstract
For the testability, this paper proposed the algorithm at autonomous synthesis which includes the data path structure as the self testing as possible on high level synthesis method when VHDL, coding is used in the system design area. In the proposed algorithm of this paper, MUXs and registers are assigned to the data path of designed system. And the designed data path could be mapped the H/W specification of described VHDL coding to the testable library. As a results, it was mapped H/W to the assign algorithm that is minimized MUX and the registers in collision graph.
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