• Title/Summary/Keyword: MOS resistor

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Frequency Analysis of a Transconductor based Chua's Circuit with the MOS Variable Resistor for Secure Communication Applications (암호통신응용을 위한 MOS 가변저항을 가진 트랜스콘덕터 기반 추아회로의 주파수 해석)

  • Nam, Sang-Guk;Song, Han-Jung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.13 no.12
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    • pp.6046-6051
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    • 2012
  • In this paper, we designed a Chua's chaotic circuit using transcondcutor based nonlinear resistor for secure communication applications. Proposed chaotic circuit consist of passive devices such as L and C, a MOS based variable resistor and a transcondcutor based Chua's diode. From SPICE simulation results, the proposed circuit showed variable chaotic dynamics through time waveforms, frequency analysis and phase plots.

PSPICE analysis of the Lorenz circuit using the MOS resistor (MOS 가변저항을 이용한 로렌츠 회로의 PSPICE 해석)

  • Ji, Sung-Hyun;Kim, Boo-Kang;Nam, Sang-Guk;Nguyen, Van Ha;Park, Yong Su;Song, Han Jung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.16 no.2
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    • pp.1348-1354
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    • 2015
  • In this paper, chaotic circuit of the voltage controlled Lorentz system for engineering applications has been designed and implemented in an electronic circuit. The proposed circuit consists of MOS variable resistor, multipliers, capacitors, fixed resistors and operational amplifiers. The circuit was analysed by PSPICE program. PSPICE simulation results show that chaotic dynamics of the circuit can be controlled by the MOS variable resistor through time series analysis, frequency analysis and phase diagrams. Also, we implemented the proposed circuit in an electronic hardware system with discrete elements. Measured results of the circuit showed controllability of the circuit using the MOS resistor.

A Study on the Design of Contunous-Time GYRATOR Filter for VLSI (VLSI 구현을 위한 연속시간 GYRATOR 필터회로 설계에 관한 연구)

  • 김석호;조성익;정우열;정학기;정경택;이종인
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.19 no.1
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    • pp.83-90
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    • 1994
  • In this paper, the GYRATOR circuit is designed by the highly linear MOS transconductor with the gain factor controllable by offset voltage, and the floating inductor, the floating resistor and the grounded resistor are simulated by the GYTATOR for VLSI. And for the design exmple, Butterworth filter is designed using this GYRATOR, and is conpensated by the frequency transformation for the frequency shift that due to non-ideal output impedance of transconductor.

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Design of Gyrator Filter using Switched Capacitors (Switched Capacitor를 이용한 Gyrator여파기의 설계)

  • 원청육;이문수
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.7 no.1
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    • pp.10-17
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    • 1982
  • Recently, there has been a great interest in the realization of analog fiters using switched and fixed capacitors and active elements. It is known that a switched capacitor has an performance much better that a resistor in the characteristics of temperature and linearity, and can be fabricated on the much smaller area than the resistor. In this paper all the resistors in the gyrator filter network are relpaced by the switched capacitors for an SC-Gyrator filter circuit can be fully integrated into a single chip by using MOS technology. By experiments we show that the response of designed SC-Gyrator filter is much similar to that of its protorype gyrator filter.

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Indium-Zinc Oxide Thin Film Transistors Based N-MOS Inverter (Indium-Zinc 산화물 박막 트랜지스터 기반의 N-MOS 인버터)

  • Kim, Han-Sang;Kim, Sung-Jin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.30 no.7
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    • pp.437-440
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    • 2017
  • We report on amorphous thin-film transistors (TFTs) with indium zinc oxide (IZO) channel layers that were fabricated via a solution process. We prepared the IZO semiconductor solution with 0.1 M indium nitrate hydrate and 0.1 M zinc acetate dehydrate as precursor solutions. The solution- processed IZO TFTs showed good performance: a field-effect mobility of $7.29cm^2/Vs$, a threshold voltage of 4.66 V, a subthreshold slope of 0.48 V/dec, and a current on-to-off ratio of $1.62{\times}10^5$. To investigate the static response of our solution-processed IZO TFTs, simple resistor load-type inverters were fabricated by connecting a $2-M{\Omega}$ resistor. Our IZOTFTbased N-MOS inverter performed well at operating voltage, and therefore, isa good candidate for advanced logic circuits and display backplane.

Macro Modeling of MOS Transistors for RF Applications (RF 적용을 위한 MOS 트랜지스터의 매크로 모델링)

  • 최진영
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.36D no.5
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    • pp.54-61
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    • 1999
  • We suggested a macro medel for MOS transistors, which incorporates the distributed substrate resistance by using a method which utilizes external diodes on SPICE MOS model. By fitting the simulated s-parameters to the measures ones, we obtained a model set for the W=200TEX>$\mu\textrm{m}$ and L=0.8TEX>$\mu\textrm{m}$ NMOS transistor, and also analyzed the effects of distributed substrate resistance in the RF range. By comparing the physical parameters calculated from simulated s-parameters such as ac resistances and capacitances with the measured ones, we confirmed the validity of the simulation results. For the frequencies below 10GHz, it seems appropriated to use a simple macro model which utilizes the existing SPICE MOS model with junction diodes, after including one lumped resistor each for gate and substrate nodes.

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Low-Power and Wide-Input Range Voltage Controlled Linear Variable Resistor Using an FG-MOSFET and Its Application

  • Kushima, Muneo;Tanno, Koichi;Kumagai, Hiroo;Ishizuka, Okihiko
    • Proceedings of the IEEK Conference
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    • 2002.07b
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    • pp.759-762
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    • 2002
  • In this paper, a voltage-controlled linear variable resistor (VCLVR) using a floating-gate MOS-FET (FG-MOSFET) is proposed. The proposed-circuit is the grounded VCLVR consists of only an ordinary MOSFET and an FG-MOSFET. The advantage of the proposed VCLVR are low-voltage and wide-input range. Next, as applications, a floating-node voltage controlled variable resistor and an operational transconductance amplifier using the proposed VCLVRs are proposed. The performance of the proposed circuits are characterized through HSPICE simulations with a standard 0.6 ${\mu}$m CMOS process. simulations of the proposed VCLVR demonstrate a resistance value of 40 k$\Omega$ to 338 k$\Omega$ and a THD of less than 1.1 %.

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One port resistor cell for CMOS analog integrated circuits (CMOS 아날로그 집적회로를 위한 새로운 구조의 One port 저항 셀)

  • Jo, Young-Chang;Kim, Sung-Hwan;Choi, Pyung
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.3
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    • pp.135-139
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    • 1996
  • It is difficult to fabricate precise resistors for the analog integrated circuits using MOS technology. Until now polysilicon resistors were used at the analog integrated circuits, but some deviations of resistance and sensitive variation processes still cause their misactions. In order to improve these misactions, we suggest a CMOS resistor cell which provides precise resistance and excellant linearity. Also we designed the second order active low pass filter using the CMOS resistor cells and verified their superior performances compared to the actual resistors.

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Chaotic Dynamics of a Tansconductor-based Chua's Circuit According to Temperature Variation (트랜스콘덕터 기반 추아회로의 온도변화에 따른 카오스 다이내믹스)

  • Shin, Bong-Jo;Song, Han-Jung
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.25 no.9
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    • pp.686-691
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    • 2012
  • In this paper, we designed a Chua's chaotic circuit using transcondcutor based nonlinear resistor. Proposed chaotic circuit consist of L, C, R and transcondcutor based Chua's diode. We performed SPICE simulation for chaotic dynamics such as time seriesform, frequency analysis and phase plane of the circuit. Chaotic dynamics of the circuit was analysed according to MOS size variation of the operational transconductance amplifier. Also, we performed SPICE circuit analysis for temperature dependance of the circuit. SPICE results showed that chaotic dynamics of the circuit varied according to the temperature variation and chaotic signals were generated in specific temperature conditions.

Study on Solution Processed Indium Zinc Oxide TFTs Using by Femtosecond Laser Annealing Technology (펨토초 레이저 어닐링 기술을 이용한 용액 공정 기반의 비정질 인듐 징크 산화물 트랜지스터에 관한 연구)

  • Kim, Han-Sang;Kim, Sung-Jin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.31 no.1
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    • pp.50-54
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    • 2018
  • In this study, a femtosecond laser pre-annealing technology based on indium zinc oxide (IZO) thin-film transistors (TFTs) was investigated. We demonstrated a stable pre-annealing process to analyze the change in the surface structures of thin-films, and we improved the electrical performance. Furthermore, static and dynamic electrical characteristics of IZO TFTs with n-channel inverters were observed. To investigate the static and dynamic responses of our solution-processed IZO TFTs, simple resistor-load-type inverters were fabricated by connecting a $1-M{\Omega}$ resistor. The femtosecond laser pre-annealing process based on IZO TFTs showed good performance: a field-effect mobility of $3.75cm_2/Vs$, an $I_{on}/I_{off}$ ratio of $1.8{\times}10^5$, a threshold voltage of 1.13 V, and a subthreshold swing of 1.21 V/dec. Our IZO-TFT-based N-MOS inverter performed well at operating voltage, and therefore, is a good candidate for advanced logic circuits and display backplane.