• Title/Summary/Keyword: MOS devices

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Smart Home System Using Internet of Things

  • Santoso, Leo Willyanto;Lim, Resmana;Trisnajaya, Kevin
    • Journal of information and communication convergence engineering
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    • v.16 no.1
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    • pp.60-65
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    • 2018
  • The Internet of Things (IoT) is happening now. By implementing IoT, we can build smart home system. Smart home is an application that is a combination of technology and services that specialize in the home environment with specific functions aimed at improving the efficiency, comfort and security of the occupants. Smart homes filled with connected products are loaded with possibilities to make our lives easier, more convenient, and more comfortable. This intelligent home system uses a microcontroller to process functions that provided by smart home system, such functions as RFID for door access and PIR sensors for motion detection. By using Android users could control the sensors anytime and anywhere. Microcontroller used is Arduino IDE with WeMos D1R2 board. Based on the testing process, there was a successful communication between the components of the device, sensors, and Android devices. Users could open or close the solenoid, users can also turn off or turn on electronic devices using Android.

3-D Characterizing Analysis of Buried-Channel MOSFETs (매몰공핍형 MOS 트랜지스터의 3차원 특성 분석)

  • Kim, M. H.
    • Proceedings of the Optical Society of Korea Conference
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    • 2000.08a
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    • pp.162-163
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    • 2000
  • We have observed the short-channel effect, narrow-channel effect and small-geometry effect in terms of a variation of the threshold voltage. For a short-channel effect the threshold voltage was largely determined by the DIBL effect which stimulates more carrier injection in the channel by reducing the potential barrier between the source and channel. The effect becomes more significant for a shorter-channel device. However, the potential, field and current density distributions in the channel along the transverse direction showed a better uniformity for shorter-channel devices under the same voltage conditions. The uniformity of the current density distribution near the drain on the potential minimum point becomes worse with increasing the drain voltage due to the enhanced DIBL effect. This means that considerations for channel-width effect should be given due to the variation of the channel distributions for short-channel devices. For CCDs which are always operated at a pinch-off state the channel uniformity thus becomes significant since they often use a device structure with a channel length of > 4 ${\mu}{\textrm}{m}$ and a very high drain (or diffusion) voltage. (omitted)

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Effects of Temperature Stress on VFB Shifts of HfO2-SiO2 Double Gate Dielectrics Devices

  • Lee, Kyung-Su;Kim, Sang-Sub;Choi, Byoung-Deog
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.340-341
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    • 2012
  • In this work, we investigated the effects of temperature stress on flatband voltage (VFB) shifts of HfO2-SiO2 double gate dielectrics devices. Fig. 1 shows a high frequency C-V of the device when a positive bias for 10 min and a subsequent negative bias for 10 min were applied at room temperature (300 K). Fig. 2 shows the corresponding plot when the same positive and negative biases were applied at a higher temperature (473.15 K). These measurements are based on the BTS (bias temperature stress) about mobile charge in the gate oxides. These results indicate that the positive bias stress makes no difference, whereas the negative bias stress produces a significant difference; that is, the VFB value increased from ${\Delta}0.51$ V (300 K, Fig. 1) to ${\Delta}14.45$ V (473.15 K, Fig. 2). To explain these differences, we propose a mechanism on the basis of oxygen vacancy in HfO2. It is well-known that the oxygen vacancy in the p-type MOS-Cap is located within 1 eV below the bottom of the HfO2 conduction band (Fig. 3). In addition, this oxygen vacancy can easily trap the electron. When heated at 473.15 K, the electron is excited to a higher energy level from the original level (Fig. 4). As a result, the electron has sufficient energy to readily cross over the oxide barrier. The probability of trap about oxygen vacancy becomes very higher at 473.15 K, and therefore the VFB shift value becomes considerably larger.

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Progress in Novel Oxides for Gate Dielectrics and Surface Passivation of GaN/AlGaN Heterostructure Field Effect Transistors

  • Abernathy, C.R.;Gila, B.P.;Onstine, A.H.;Pearton, S.J.;Kim, Ji-Hyun;Luo, B.;Mehandru, R.;Ren, F.;Gillespie, J.K.;Fitch, R.C.;Seweel, J.;Dettmer, R.;Via, G.D.;Crespo, A.;Jenkins, T.J.;Irokawa, Y.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.3 no.1
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    • pp.13-20
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    • 2003
  • Both MgO and $Sc_2O_3$ are shown to provide low interface state densities (in the $10^{11}{\;}eV^{-1}{\;}cm{\;}^{-2}$ range)on n-and p-GaN, making them useful for gate dielectrics for metal-oxide semiconductor(MOS) devices and also as surface passivation layers to mitigate current collapse in GaN/AlGaN high electron mobility transistors(HEMTs).Clear evidence of inversion has been demonstrated in gate-controlled MOS p-GaN diodes using both types of oxide. Charge pumping measurements on diodes undergoing a high temperature implant activation anneal show a total surface state density of $~3{\;}{\times}{\;}10^{12}{\;}cm^{-2}$. On HEMT structures, both oxides provide effective passivation of surface states and these devices show improved output power. The MgO/GaN structures are also found to be quite radiation-resistant, making them attractive for satellite and terrestrial communication systems requiring a high tolerance to high energy(40MeV) protons.

The characteristics of source/drain structure for MOS typed device using Schottky barrier junction (Schottky 장벽 접합을 이용한 MOS형 소자의 소오스/드레인 구조의 특성)

  • 유장열
    • Journal of the Korean Institute of Telematics and Electronics T
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    • v.35T no.1
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    • pp.7-13
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    • 1998
  • The VLSI devices of submicron level trend to have a lowering of reliability because of hot carriers by two dimensional influences which are caused by short channel effects and which are not generated in a long channel devices. In order to minimize the two dimensional influences, much research has been made into various types of source/drain structures. MOS typed tunnel transistor with Schottky barrier junctions at source/drain, which has the advantages in fabrication process, downsizing and response speed, has been proposed. The experimental device was fabricated with p type silicon, and manifested the transistor action, showing the unsaturated output characteristics and the high transconductance comparing with that in field effect mode. The results of trial indicate for better performance as follows; high doped channel layer to lower the driving voltage, high resistivity substrate to reduce the leakage current from the substrate to drain.

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Implementation of fluid flow measuring and warning alarm system using an WeMos and an fluid flow sensor (WeMos와 유량 센서를 이용한 유속 모니터링 및 경보 알림 시스템 구현)

  • Yoo, Moonsung
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.19 no.1
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    • pp.139-143
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    • 2019
  • Measurement of flow rate is required in various fields. Water meters are often used at home, and flow meters are used in water and sewage plants, petrochemical industries and so on.. A system is needed to monitor the flow rate in real time and notify immediately when flow rate is abnormal. Recently, with the development of the IoT it is possible to construct such devices at low cost. WeMos can be programmed with Arduino IDE as a mini wifii IoT module. The flow sensor can output a digital pulse proportional to the flow rate. In this paper, we developed the flow monitoring and warning system using WeMos and IoT technology. When the system operates, it calculates the flow rate, sends the value as JSON format to the server, monitors the flow rate as graph from the remote with the smartphone. We also implement the system to promptly send alert message to the smart phone using Pushbullet when the flow rate is abnormal.

An Experimental Study on the Threshold Voltage and Punchthrough Voltage Reduction in Short-Channel NMOS Transistors (채널의 길이가 짧은 NMOS 트랜지스터의 Threshold 전압과 Punchthrough 전압의 감소에 관한 실험적연구)

  • Lee, Won-Sik;Im, Hyeong-Gyu;Kim, Bo-U
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.20 no.2
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    • pp.1-6
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    • 1983
  • The reduction of threshold voltage and punchthrough voltage of short channel MOS transistors has been measured experimentally with silicon gate NMOS transistors. The effects of the gate oxide thickness and substrate doping concentration on the threshold voltage and punch-through voltage have also been measured with sample devices with boron implantation and gate oxide thickness of 50 nm and 70 nm. Hot electron emission has been measured by floating gate method for the samples with 3 ${\mu}{\textrm}{m}$ channel length. It has been concluded from this measurement that hot electron emission is not significant for the channel length of 3${\mu}{\textrm}{m}$.

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A study on Effect of Surface ion Implantation for Suppression of Hot carrier Degradation of LDD-nMOSFETs (LDD-nMOSFET의 핫 캐리어 열화 억제를 위한 표면 이온주입 효과에 대한 연구)

  • Seo, Yong-Jin;An, Tae-Hyun;Kim, Sang-Yong;Kim, Tae-Hyung;Kim, Chang-Il;Chang, Eui-Goo
    • Proceedings of the KIEE Conference
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    • 1998.11c
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    • pp.735-736
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    • 1998
  • Reduction of hot carrier degradation in MOS devices has been one of the most serious concerns for MOS-ULSIs. In this paper, three types of LDD structure for suppression of hot carrier degradation, such as spacer-induced degradation and decrease of performance due to increase of series resistance will be investigated. LDD-nMOSFETs used in this study had three different drain structure. (1) conventional ${\underline{S}}urface$ type ${\underline{L}}DD$(SL), (2) ${\underline{B}}uried$ type ${\underline{L}}DD$(BL), (3) ${\underline{S}}urface$urface ${\underline{I}}mplantation$ type LDD(SI). As a result, the surface implantation type LDD structure showed that improved hot carrier lifetime to comparison with conventional surface and buried type LDD structure.

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Design of DC-DC converter for a logic process MTP memory IPs (로직 공정 기반의 MTP IP용 DC-DC 컨버터 설계)

  • Park, Heon;Lee, Seung-Hoon;Jin, Kyo-Hong;Ha, Pan-Bong;Kim, Young-Hee
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.05a
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    • pp.832-836
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    • 2015
  • In this paper, a DC-DC converter is designed for logic process MTP (multi-time programmable) memory IPs using dual program voltage, which are used for analog trimming or storing chip IDs in sensor applications. The DC-DC converter supplies VPP (=5.25V), VNN (=-5.25V), and VNNL ($=2{\cdot}VNN/5$). It uses MOS capacitors and designed with only 3,3V devices. VPP and VNN are configured in two and five stages, respectively. And their pumping currents are $9.17{\mu}A$ and $9.7{\mu}A$, respectively.

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A Study on the 1,700 V Rated NPT Trench IGBT Analysis by PIN Diode - PNP Transistor Model (PIN 다이오드 - PNP 트랜지스터 결합모델에 의한 1,700 V급 NPT 트랜치 IGBT의 해석에 관한 연구)

  • Lee, Jong-Seok;Kyoung, Sin-Su;Kang, Ey-Goo;Sung, Man-Young
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.21 no.10
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    • pp.889-895
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    • 2008
  • This paper presents a comprehensive mathematical analysis and simulation of trench IGBT with the help of PIN-PNP combinational model. Since trench IGBT is characteristically influenced by PIN diode, it may be almost impossible to analyze the trench IGBT using PNP-MOS modeling methods, even PIN-MOS techniques which neglect the hole current components coming into p-base region. A new PIN-PNP complementary cooperational model is developed in order to make up the drawbacks of existing models. It would allow us to make qualitative analysis as well as simulation about switching and on-state characteristics of 1,700 V trench IGBT. Moreover, if we improve the PIN diode effects through the optimization of trench structure, trench IGBT is expected to be one of the most promising devices in the not only high-voltage but also high speed switching device field.