• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.4
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• pp.501-505
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• 2015

In this paper, we demonstrated a 4W power amplifier monolithic microwave integrated circuit (MMIC) for Ku-band satellite communication applications. The used device technology relies on $0.25{\mu}m$ GaAs pseudomorphic high electron mobility transistor (PHEMT) process. The 4W power amplifier MMIC has linear gain of over 30 dB and saturated output power of over 36.1 dBm in the frequency range of 13.75 GHz ~ 14.5 GHz. Power added efficiency (PAE) is over 30 %.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.8
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• pp.1733-1739
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• 1997

An ultra-compact milimeter-wave broadband MMIC amplifier was designed using a direct-coupled topology combined with optimum feedback design. Significant reductionin the chip size was possible by employing the direct-coupled topology. Bias resistors required for the direct-coupled topology were also used as feedback elements. Feedback was optimized for millimeter-wave frequencies using reactive elements. The fabricated MMIC amplifier was realized in a chip size of 0.8mm$^{[-992]}$ and showed gains higher than 8 dB from 12 to 44 GHz. An output power of 30mW was achieved at 44 GHz with a drain efficiency of 10%.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.6A
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• pp.634-639
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• 2006

In this paper an MMIC 2-stage power amplifier is designed and fabricated for 5GHz wireless LAN applications using $0.5{\mu}m$ gate length PHEMT transistors. The PHEMT gate width is optimized in order to meet the linearity and efficiency of the MMIC power amplifier. The $0.5{\mu}m\times600{\mu}m$ PHEMT for the drive stage and $0.5{\mu}m\times3000{\mu}m$ PHEMT for the amplification stage are the optimized sizes to achieve more than 25dBc of third order IMD at the power level of 3dB back-off from the input P1dB and more than 22dBm output power under a supply voltage of 3.3V. The two-stage MMIC power amplifier is designed to be used for the both of HIPERLAN/2 and IEEE 802.11a because of its broadband characteristics. The fabricated PHEMT MMIC power amplifier exhibits a 20.1dB linear power gain, a maximum 22dBm output power, a 24% power added efficiency under 3.3V supply voltage. The input and output on-chip matching circuits are included on a chip of $1400\times1200{\mu}m^2$.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.3
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• pp.339-345
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• 2016

This paper presents a two-stage power amplifier MMIC using a $0.4{\mu}m$ GaN-HEMT process. The two-stage structure provides high gain and compact circuit size using an integrated inter-stage matching network. The size and loss of the inter-stage matching network can be reduced by including bond wires as part of the matching network. The two-stage power amplifier MMIC was fabricated with a chip size of $2.0{\times}1.9mm^2$ and was mounted on a $4{\times}4$ QFN carrier for evaluation. Using a downlink LTE signal with a PAPR of 6.5 dB and a channel bandwidth of 10 MHz for the 2.6 GHz band, the power amplifier MMIC exhibited a gain of 30 dB, a drain efficiency of 32%, and an ACLR of -31.4 dBc at an average output power of 36 dBm. Using two power amplifier MMICs for the carrier and peaking amplifiers, a Doherty power amplifier was designed and implemented. At a 6 dB back-off output power level of 39 dBm, a gain of 24.7 dB and a drain efficiency of 43.5% were achieved.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.9
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• pp.882-888
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• 2002

This paper proposed a bias stability circuit that compensates the degradation of MMIC's performance for the variation of the process and temperature. The proposed bias circuit proved the superior effect compared with the conventional bias circuit using the constant current source. It designed and fabricated simultaneously two amplifier on one layout for comparison in same conditions. One is amplifier with conventional bias circuit using constant current source and the other is amplifier with proposed bias stability circuit. The chip was measured the microwave performances under process variation that classed the level NOM, MIN and MAX. The amplifier with a conventional bias circuit using constant current source has 6.4 dB gain variation and 7 mA Ids variation at 1.8 GHz, but the amplifier with the proposed bias circuit has the 2.1 dB gain variation and 3 mA Ids variation. As the result, MMIC having the proposed bias circuit shows the superior compensation of the quiescent point than the MMIC having the conventional bias circuit under the variations of the process and temperature and can improve the yield of the MMIC. The fabricated chip size is 1.2 mm $\times$ 1.4 mm.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.11
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• pp.1019-1022
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• 2016

In this paper, a 2~16 GHz GaN wideband power amplifier MMIC s designed and fabricated using the nonuniform power amplifier design technique that utilizes drain shunt capacitors to simultaneously provide each transistor with the optimum load impedance and phase balance between input and output transmission lines. The power amplifier MMIC chip that is fabricated using the $0.25{\mu}m$ GaN HEMT foundry process of Win Semiconductors occupies an area of $3.9mm{\times}3.1mm$ and shows a linear gain of larger than 12 dB and an input return loss of greater than 10 dB. Under a continuous-wave mode, it has a saturated output power of 36.2~38.5 dBm and a power-added efficiency of about 8~16 % in 2 to 16 GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.10
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• pp.1083-1088
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• 2002

A 5.8 GHz high gain MMIC amplifier was designed and fabricated. A HEMT was used as a active device and the spiral inductors and the metal insulator metal capacitors were used as the passive devices. To stabilize the high gain amplifier a RC feedback circuit was used. The amplifier has 4 stage and 31 dB measured gain. To prevent a oscillation by the coupling effects among the passive devices, the distance between the passive devices are made as far as possible. The via grounds were used to reduce the coupling effect between the input stage and the output stage.

• JSTS:Journal of Semiconductor Technology and Science
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• v.3 no.1
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• pp.42-46
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• 2003

In this paper, an MMIC broadband amplifier for wireless communication systems has been developed by using an active feedback method. This active feedback operates at much higher frequencies than a method by a spiral inductor feedback and its size is independent of the inductance value. The MMIC broadband amplifier was designed using a $0.5{\;}{\mutextrm{m}}$ MESFET library. The fabricated chip area was $1.4{\;}mm{\;}{\times}{\;}1.4{\;}mm. Measurement showed a gain of 18 dB with a gain flatness of ${\pm}3$ dB in a 1.5 GHz~3.5 GHz band. The maximum output power and the minimum noise figure were 14 dBm and 2.5 dB in the same band, respectively.

• ETRI Journal
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• v.32 no.1
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• pp.151-153
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• 2010

A highly efficient linear and compactly integrated series-type Doherty power amplifier (PA) has been developed for wideband code-division multiple access handset applications. To overcome the size limit of a typical Doherty amplifier, all circuit elements, such as matching circuits and impedance transformers, are fully integrated into a single monolithic microwave integrated circuit (MMIC). The implemented PA shows a very low idle current of 25 mA and an excellent power-added efficiency of 25.1% at an output power of 19 dBm by using an extended Doherty concept. Accordingly, its average current consumption was reduced by 51% and 41% in urban and suburban environments, respectively, when compared with a class-AB PA. By adding a simple predistorter to the PA, the PA showed an adjacent channel leakage ratio better than -42 dBc over the whole output power range.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.623-624
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• 2006

In this paper, we introduce the design and fabrication of V-band power amplifier MMIC with excellent gain-flatness for IEEE 802.15.3c WPAN system. The V-band power amplifier was designed using ETRI' $0.12{\mu}m$ PHEMT process. The PHEMT shows a peak transconductance ($G_{m,peak}$) of 500 mS/mm, a threshold voltage of -1.2 V, and a drain saturation current of 49 mA for 2 fingers and $100{\mu}m$ total gate width (2f100) at $V_{ds}$=2 V. The RF characteristics of the PHEMT show a cutoff frequency, $f_T$, of 97 GHz, and a maximum oscillation frequency, $f_{max}$, of 166 GHz. The gains of the each stages of the amplifier were modified to have broadband characteristics of input/output matching for first and fourth stages and get more gains of edge regions of operating frequency range for second and third stages in order to make the gain-flatness of the amplifier excellently for wide band. The performances of the fabricated 60 GHz power amplifier MMIC are operating frequency of $56.25{\sim}62.25\;GHz$, bandwidth of 6 GHz, small signal gain ($S_{21}$) of $16.5{\sim}17.2\;dB$, gain flatness of 0.7 dB, an input reflection coefficient ($S_{11}$) of $-16{\sim}-9\;dB$, output reflection coefficient ($S_{22}$) of $-16{\sim}-4\;dB$ and output power ($P_{out}$) of 13 dBm. The chip size of the amplifier MMIC was $3.7{\times}1.4mm^2$.