• Title/Summary/Keyword: MEMS packaging

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Reliable design and electrical characteristics of vertical MEMS probe tip (수직형 MEMS 프로브 팁의 신뢰성 설계 및 전기적 특성평가)

  • Lee, Seung-Hun;Chu, Sung-Il;Kim, Jin-Hyuk;Han, Dong-Chul;Moon, Sung
    • Journal of Applied Reliability
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    • v.7 no.1
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    • pp.23-29
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    • 2007
  • Probe card is a test component which is to classify the known good die with electrical contact before the packaging in the ATE (automatic testing equipment). Conventional probe tip was mostly needle type, it has been difficult to meet with conventional type, because of decreasing chip size, pad to pad pitch and pads size increasingly. For that reason, probe cards using MEMS (micro electro mechanical system) technology have been developed for various semiconductor chips. In this paper, Area Array type MEMS Probe tip was designed,, fabricated, and characterized its mechanical and electrical properties. The authors found that good electrical characteristics under $1{\Omega}$ were acquired with gold (Au) and aluminium (Al) pad contact test over 0.5gf and 4gf respectively. And, contact resistance variation under $0.1{\Omega}$ were achieved with 100,000 times of repetition test. And, insertion loss (IS) for high frequency operation was ascertained over 300MHz at -3dB loss.

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Development of micro check valve with polymer MEMS process for medical cerebrospinal fluid (CSF) shunt system (Polymer MEMS 공정을 이용한 의료용 미세 부품 성형 기술 개발)

  • Chang, J.K.;Park, C.Y.;Chung, S.;Kim, J.K.;Park, H.J.;Na, K.H.;Cho, N.S.;Han, D.C.
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2000.05a
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    • pp.1051-1054
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    • 2000
  • We developed the micro CSF (celebrospinal fluid) shunt valve with surface and bulk micromachining technology in polymer MEMS. This micro CSF shunt valve was formed with four micro check valves to have a membrane connected to the anchor with the four bridges. The up-down movement of the membrane made the CSF on & off and the valve characteristic such as open pressure was controlled by the thickness and shape of the bridge and the membrane. The membrane, anchor and bridge layer were made of the $O_2$ RIE (reactive ion etching) patterned Parylene thin film to be about 5~10 microns in thickness on the silicon wafer. The dimension of the rectangular nozzle is 0.2*0.2 $\textrm{mm}^2$ and the membrane 0.45 mm in diameter. The bridge width is designed variously from 0.04 mm to 0.12 mm to control the valve characteristics. To protect the membrane and bridge in the CSF flow, we developed the packaging system for the CSF micro shunt valve with the deep RIE of the silicon wafer. Using this package, we can control the gap size between the membrane and the nozzle, and protect the bridge not to be broken in the flow. The total dimension of the assembled system is 2.5*2.5 $\textrm{mm}^2$ in square, 0.8 mm in height. We could precisely control the burst pressure and low rate of the valve varing the design parameters, and develop the whole CSF shunt system using this polymer MEMS fabricated CSF shunt valve.

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A Study on the Fabrication of the Lateral Accelerometer using SOG(Silicon On Glass) Process (SOG(Silicon On Glass)공정을 이용한 수평형 미소가속도계의 제작에 관한 연구)

  • Choi, Bum-Kyoo;Chang, Tae-Ha;Lee, Chang-Kil;Jung, Kyu-Dong;Kim, Jong-Pal
    • Journal of Sensor Science and Technology
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    • v.13 no.6
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    • pp.430-435
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    • 2004
  • The resolution of the accelerometer, fabricated with MEMS technology is mainly affected by mechanical and electrical noise. To reduce mechanical noise, we have to increase mass of the structure part and quality factor related with the degree of vacuum packaging. On the other hand, to increase mass of the structure part, the thickness of the structure must be increased and ICP-RIE is used to fabricate the high aspect ratio structure. At this time, footing effect make the sensitivity of the accelerometer decreasing. This paper presents a hybrid SOG(Silicon On Glass) Process to fabricate a lateral silicon accelerometer with differential capacitance sensing scheme which has been designed and simulated. Using hybrid SOG Process, we could make it a real to increase the structural thickness and to prevent the footing effect by deposition of metal layer at the bottom of the structure. Moreover, we bonded glass wafer to structure wafer anodically, so we could realize the vacuum packaging at wafer level. Through this way, we could have an idea of controlling of quality factor.

Hermetic Characteristics of Negative PR (Negative PR의 기밀 특성)

  • Choi, Eui-Jung;Sun, Yong-Bin
    • Journal of the Semiconductor & Display Technology
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    • v.5 no.2 s.15
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    • pp.33-36
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    • 2006
  • Many issues arose to use the Pb-free solder as adhesive materials in MEMS ICs and packaging. Then this study for easy and simple sealing method using adhesive materials was carried out to maintain hermetic characteristic in MEMS Package. In this study, Hermetic characteristic using negative PR (XP SU-8 3050 NO-2) as adhesive at the interface of Si test coupon/glass substrate and Si test coupon/LTCC substrate was examined. For experiment, the dispenser pressure was 4 MPa and the $200\;{\mu}m{\Phi}$ syringe nozzle was used. 3.0 mm/sec as speed of dispensing and 0.13 mm as the gap between Si test coupon and nozzle was selected to machine condition. 1 min at $65^{\circ}C$ and 15 min at $95^{\circ}C$ as Soft bake, $200\;mj/cm^2$ expose in 365 nm wavelength as UV expose, 1 min at $65^{\circ}C$ and 6 min at $95^{\circ}C$ as Post expose bake, 60 min at $150^{\circ}C$ as hard bake were selected to activation condition of negative PR. Hermetic sealing was achieved at the Si test coupon/ glass substrate and Si test coupon/LTCC substrate. The leak rate of Si test coupon/glass substrate was $5.9{\times}10^{-8}mbar-l/sec$, and there was no effect by adhesive method. The leak rate of Si test coupon/LTCC substrate was $4.9{\times}10^{-8}mbar-l/sec$, and there was no effect by dispensing cycle. Better leak rate value could be achieved to use modified substrate which prevent PR flow, to increase UV expose energy and to use system that controls gap automatically with vision.

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Characterization of a Micro Power Generator using a Fabricated Electroplated Coil (전기도금 방법으로 제작한 코일을 이용한 초소형 발전기의 특성분석)

  • Lee, Dong-Ho;Kim, Seong-Il;Kim, Young-Hwan;Kim, Yong-Tae;Park, Min-Chul;Lee, Chang-Woo;Baek, Chang-Wook
    • Journal of the Microelectronics and Packaging Society
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    • v.13 no.3 s.40
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    • pp.9-12
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    • 2006
  • We have designed and fabricated micro power generators by electroplating which is important in MEMS(micro electro mechanical system) technique. We have electroplated MEMS coils on the glass substrates and have chosen one of these coils for experiments. The thickness, width, and length of the coil are $7{\mu}m,\;20{\mu}m$, and 1.6 m, respectively. We have analyzed the structure of MEMS coil by SEM. We have made a vibrating system for reproducible results in measurement. With reciprocating a magnet on the surface of a fabricated winding coil, the micro power generator produce an alternating voltage. We have changed the vibrational frequency from 0.5 Hz to 8 Hz. The generated voltage was 106 mV at 3 Hz and 198 mV at 6 Hz. We aim at the micro power generator which can change vibration energy to useful electric energy.

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Various Cu Filling Methods of TSV for Three Dimensional Packaging (3차원 패키징을 위한 TSV의 다양한 Cu 충전 기술)

  • Roh, Myong-Hoon;Lee, Jun-Hyeong;Kim, Wonjoong;Jung, Jae Pil;Kim, Hyeong-Tea
    • Journal of Welding and Joining
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    • v.31 no.3
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    • pp.11-16
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    • 2013
  • Through-silicon-via (TSV) is a major technology in microelectronics for three dimensional high density packaging. The 3-dimensional TSV technology is applied to CMOS sensors, MEMS, HB-LED modules, stacked memories, power and analog, SIP and so on which can be employed to car electronics. The copper electroplating is widely used in the TSV filling process. In this paper, the various Cu filling methods using the control of the plating process were described in detail including recent studies. Via filling behavior by each method was also introduced.

State of The Art in Semiconductor Package for Mobile Devices

  • Kim, Jin Young;Lee, Seung Jae
    • The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.2
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    • pp.23-34
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    • 2013
  • Over the past several decades in the microelectronics industry, devices have gotten smaller, thinner, and lighter, without any accompanying degradation in quality, performance, and reliability. One permanent and deniable trend in packaging as well as wafer fabrication industry is system integration. The proliferating options for system integration, recently, are driving change across the overall semiconductor industry, requiring more investment in developing, ramping and supporting new die-, wafer- and board-level solution. The trend toward 3D system integration and miniaturization in a small form factor has accelerated even more with the introduction of smartphones and tablets. In this paper, the key issues and state of the art for system integration in the packaging process are introduced, especially, focusing on ease transition to next generation packaging technologies like through silicon via (TSV), 3D wafer-level fan-out (WLFO), and chip-on-chip interconnection. In addition, effective solutions like fine pitch copper pillar and MEMS packaing of both advanced and legacy products are described with several examples.

Design and fabrication of condenser microphone with rigid backplate and vertical acoustic holes using DRIE and wafer bonding technology (기판접합기술을 이용한 두꺼운 백플레이트와 수직음향구멍을 갖는 정전용량형 마이크로폰의 설계와 제작)

  • Kwon, Hyu-Sang;Lee, Kwang-Cheol
    • Journal of Sensor Science and Technology
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    • v.16 no.1
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    • pp.62-67
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    • 2007
  • This paper presents a novel MEMS condenser microphone with rigid backplate to enhance acoustic characteristics. The MEMS condenser microphone consists of membrane and backplate chips which are bonded together by gold-tin (Au/Sn) eutectic solder bonding. The membrane chip has 2.5 mm${\times}$2.5 mm, $0.5{\mu}m$ thick low stress silicon nitride membrane, 2 mm${\times}$2 mm Au/Ni/Cr membrane electrode, and $3{\mu}m$ thick Au/Sn layer. The backplate chip has 2 mm${\times}$2 mm, $150{\mu}m$ thick single crystal silicon rigid backplate, 1.8 mm${\times}$1.8 mm backplate electrode, and air gap, which is fabricated by bulk micromachining and silicon deep reactive ion etching. Slots and $50-60{\mu}m$ radius circular acoustic holes to reduce air damping are also formed in the backplate chip. The fabricated microphone sensitivity is $39.8{\mu}V/Pa$ (-88 dB re. 1 V/Pa) at 1 kHz and 28 V polarization voltage. The microphone shows flat frequency response within 1 dB between 20 Hz and 5 kHz.

Wafer Level Package Using Glass Cap and Wafer with Groove-Shaped Via (유리 기판과 패인 홈 모양의 홀을 갖는 웨이퍼를 이용한 웨이퍼 레벨 패키지)

  • Lee, Joo-Ho;Park, Hae-Seok;Shin, Jea-Sik;Kwon, Jong-Oh;Shin, Kwang-Jae;Song, In-Sang;Lee, Sang-Hun
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.56 no.12
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    • pp.2217-2220
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    • 2007
  • In this paper, we propose a new wafer level package (WLP) for the RF MEMS applications. The Film Bulk Acoustic Resonator (FBAR) are fabricated and hermetically packaged in a new wafer level packaging process. With the use of Au-Sn eutectic bonding method, we bonded glass cap and FBAR device wafer which has groove-shaped via formed in the backside. The device wafer includes a electrical bonding pad and groove-shaped via for connecting to the external bonding pad on the device wafer backside and a peripheral pad placed around the perimeter of the device for bonding the glass wafer and device wafer. The glass cap prevents the device from being exposed and ensures excellent mechanical and environmental protection. The frequency characteristics show that the change of bandwidth and frequency shift before and after bonding is less than 0.5 MHz. Two packaged devices, Tx and Rx filters, are attached to a printed circuit board, wire bonded, and encapsulated in plastic to form the duplexer. We have designed and built a low-cost, high performance, duplexer based on the FBARs and presented the results of performance and reliability test.

Design, Fabrication and Performance Test of A Non-Vacuum Packaged Single Crystalline Silicon MEMS Gyroscope (대기압형 단결정 실리콘 MEMS 각속도계의 설계, 제작 및 성능 측정)

  • Jung, Hyoung-Kyoon;Hwang, Young-Seok;Sung, Woon-Tahk;Chang, Hyun-Kee;Lee, Jang-Gyu;Kim, Yong-Kweon
    • Proceedings of the KIEE Conference
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    • 2006.07c
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    • pp.1635-1636
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    • 2006
  • In this paper, a non-vacuum packaged single crystalline silicon MEMS gyroscope is designed, fabricated and tested. To reduce air damping of the gyroscope structure for non-vacuum packaging, air damping model is used and damping is minimized by analysis. The inner and outer spring length is optimized by ANSYS simulation for rigid body motion. The gyroscope is fabricated by SiOG(Silicon On Glass) process. The performance of the gyroscope is measured to evaluate the characteristic of the gyroscope. The sensitivity, non-linearity, noise density and the bias stability are measured to 9.7693 mV/deg/s, 04265 %, 2.3 mdeg/s/rtHz and 16.1014 deg/s, respectively.

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