• Title/Summary/Keyword: Low-power processor

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An embedded vision system based on an analog VLSI Optical Flow vision sensor

  • Becanovic, Vlatako;Matsuo, Takayuki;Stocker, Alan A.
    • Proceedings of the Korea Society of Information Technology Applications Conference
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    • 2005.11a
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    • pp.285-288
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    • 2005
  • We propose a novel programmable miniature vision module based on a custom designed analog VLSI (aVLSI) chip. The vision module consists of the optical flow vision sensor embedded with commercial off-the-shelves digital hardware; in our case is the Intel XScale PXA270 processor enforced with a programmable gate array device. The aVLSI sensor provides gray-scale imager data as well as smooth optical flow estimates, thus each pixel gives a triplet of information that can be continuously read out as three independent images. The particular computational architecture of the custom designed sensor, which is fully parallel and also analog, allows for efficient real-time estimations of the smooth optical flow. The Intel XScale PXA270 controls the sensor read-out and furthermore allows, together with the programmable gate array, for additional higher level processing of the intensity image and optical flow data. It also provides the necessary standard interface such that the module can be easily programmed and integrated into different vision systems, or even form a complete stand-alone vision system itself. The low power consumption, small size and flexible interface of the proposed vision module suggests that it could be particularly well suited as a vision system in an autonomous robotics platform and especially well suited for educational projects in the robotic sciences.

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Water Quality Control System Development for Cooling Towers (냉각탑 수질관리를 위한 자동화 시스템 개발)

  • Lee, Ki-Keon;Song, Moo-Jun;Lee, Young-Jae;Sung, Sang-Kyung;Kang, Tae-Sam
    • Journal of Institute of Control, Robotics and Systems
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    • v.14 no.1
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    • pp.36-41
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    • 2008
  • Cooling tower is an important equipment of the cooling systems for large buildings like factory and department store. Water used for cooling in cooling tower is reused continuously. If the water is polluted, corrosion and scale can happen at equipments and pipes. In order to prevent this problem, it is necessary to control the water quality using chemicals. To control the water quality, an automatic control system is designed, fabricated, and experimented. The control system is based on an imbedded microcontroller. Relays are used for power driving, an LCD and LED for display, and RS485 for remote data acquisition. Monitoring program is also developed for easy man-machine interface and extraction of data stored in the imbedded processor and EEPROM. The control system calculates amounts of chemicals necessary using sensor data and injects the chemicals into the cooling tower on proper time. The developed water quality control system is expected to reduce cost of maintenance and extend the lifetime of the cooling systems with low cost.

A state transition based situation modeling and its application to design of SAC(Situation-Action Converter) for situation-aware control for embedded systems (임베디드 시스템에서의 상황인식 제어를 위한 상태전이 기반 상황 모델링과 이를 응용한 상황-동작 변환기 (SAC)의 설계)

  • Heo Gil;Park Joshua;Cho We-Duke;Choi Jae-Young
    • Journal of KIISE:Computer Systems and Theory
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    • v.33 no.9
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    • pp.642-649
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    • 2006
  • In order to recognize a situation from a environment which provides an intelligent service, we propose state-transition based situation modeling which is suitable for a low computing power and restricted resources like embedded systems, and we designed its application to a situation-action converter(SAC)which is consist of two parts; situation detector recognized wanted situations and action generator generated various control actions. Then, we implemented a situation manager for smart scheduler service by using a SAC which is installed to a ARM processor based embedded Linux evaluation board.

Folded Architecture for Digital Gammatone Filter Used in Speech Processor of Cochlear Implant

  • Karuppuswamy, Rajalakshmi;Arumugam, Kandaswamy;Swathi, Priya M.
    • ETRI Journal
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    • v.35 no.4
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    • pp.697-705
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    • 2013
  • Emerging trends in the area of digital very large scale integration (VLSI) signal processing can lead to a reduction in the cost of the cochlear implant. Digital signal processing algorithms are repetitively used in speech processors for filtering and encoding operations. The critical paths in these algorithms limit the performance of the speech processors. These algorithms must be transformed to accommodate processors designed to be high speed and have less area and low power. This can be realized by basing the design of the auditory filter banks for the processors on digital VLSI signal processing concepts. By applying a folding algorithm to the second-order digital gammatone filter (GTF), the number of multipliers is reduced from five to one and the number of adders is reduced from three to one, without changing the characteristics of the filter. Folded second-order filter sections are cascaded with three similar structures to realize the eighth-order digital GTF whose response is a close match to the human cochlea response. The silicon area is reduced from twenty to four multipliers and from twelve to four adders by using the folding architecture.

Embedded Web Server Implementation for Building Sensor Network Design (빌딩 센서 네트워크 설계를 위한 임베디드 웹서버 구축)

  • Kim, Yong-Ho;Nam, Soung-Youl;Kim, Hyeong-Gyun;Choi, Gwang-Mi
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • v.9 no.2
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    • pp.1015-1018
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    • 2005
  • This study intended to demonstrate a general system as an web server implemented by pure software solution and focused on collecting data by remote control through Internet and constructing its' control frame. To achieve these, this study suggested an optimized, low-power, ultra tiny embedded web server. When unpredictable accidents, such as heat sensor or industrial disasters, happen, it will connect sensors collecting building information each other by network and obtain final results via web porting, web hardware control or porting, or hardware test process in a boot loader on the basis of StrongARM SA-1110 processor.

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Development and Characterization of Multi-Segmented Tissue Equivalent Proportional Counter for Microdosimetry (마이크로 도시메트리용 다분할 조직등가비례계수기의 개발과 특성 평가)

  • Nam, Uk-Won;Park, Won-Kee;Lee, Jaejin;Pyo, Jeonghyun;Moon, Bong-Kon;Moon, Myung Kook;Lim, Chang Hwy;Lee, Suhyun;Kim, Sunghwan
    • Journal of Sensor Science and Technology
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    • v.24 no.2
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    • pp.101-106
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    • 2015
  • We designed, developed and characterized a multi-segmented tissue equivalent proportional (TEPC) counter for microdosimetry. The energy resolution of the multi-segmented TEPC was about 12% for $^{241}Am$ 5.45 MeV alpha particles. The resolution was better than 33% for a single un-segmented TEPC. A compact and low power consumption TEPC could be made by using digital pulse processor (DPP). We also successfully calibrated the TEPC by using $^{252}Cf$ standard neutron source in Korea Research Institute of Standards and Science (KRISS). According to the results, the TEPC is useful for several application of radiation monitoring such as a neutron monitor, air crew monitor and space dosimeter.

Development of Embedded System Based Cortex-M for Smart Manufacturing (스마트 제조를 위한 Cortex-M 기반 임베디드 시스템 개발)

  • Cho, Choon-Nam
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.33 no.4
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    • pp.326-330
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    • 2020
  • Small-scale production control systems for smart manufacturing are becoming increasingly necessary as the manufacturing industry seeks to maximize manufacturing efficiency as the demand for customized product production increases. Correspondingly, the development of an embedded system to realize this capability is becoming important. In this study, we developed an embedded system based on an open source system that is cheaper than a widely applied programmable logic controller (PLC)-based production control system that is easier to install, configure, and process than a conventional relay control panel. This embedded system is system is based on a low-power, high-performance Cortex M4 processor and can be applied to smart manufacturing. It is designed to improve the development environment and compatibility of existing PLCs, control small-scale production systems, and enable data collection through heterogeneous communication. The real-time response characteristics were confirmed through an operation test for input/output control and data collection, and it was confirmed that they can be used in industrial sites.

Development of Ultrasonic Inspection System and Application to Overlay Weld Flaw Detection (초음파 자동 검사시스템의 개발과 오버레이 용접부의 결함검사)

  • Nam, Young-Hyun;Seong, Un-Hak
    • Journal of the Korean Society for Nondestructive Testing
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    • v.20 no.6
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    • pp.562-567
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    • 2000
  • Many pressure vessels for power and industrial plant are fabricated from low alloy carbon steels. The inner sides of pressure vessels are commonly weld-cladded with austenitic stainless steels to minimize problems of corrosive attack. Disbonding cracks are often detected at the transition region of welding interlayer, which is serious problem to reliability of pressure vessels. We have developed C-scan system to high speed inspection of overlay weld using DSP(digital signal processor). This system consists of signal processing parts (oscilloscope, pulser/receiver, digitizer, DSP), scanner, program and position controller. The developed system has been applied to a practical ultrasonic testing in overlay weld, and demonstrated high speed with precision

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Analysis of Performance, Energy-efficiency and Temperature for 3D Multi-core Processors according to Floorplan Methods (플로어플랜 기법에 따른 3차원 멀티코어 프로세서의 성능, 전력효율성, 온도 분석)

  • Choi, Hong-Jun;Son, Dong-Oh;Kim, Jong-Myon;Kim, Cheol-Hong
    • The KIPS Transactions:PartA
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    • v.17A no.6
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    • pp.265-274
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    • 2010
  • As the process technology scales down and integration densities continue to increase, interconnection has become one of the most important factors in performance of recent multi-core processors. Recently, to reduce the delay due to interconnection, 3D architecture has been adopted in designing multi-core processors. In 3D multi-core processors, multiple cores are stacked vertically and each core on different layers are connected by direct vertical TSVs(through-silicon vias). Compared to 2D multi-core architecture, 3D multi-core architecture reduces wire length significantly, leading to decreased interconnection delay and lower power consumption. Despite the benefits mentioned above, 3D design technique cannot be practical without proper solutions for hotspots due to high temperature. In this paper, we propose three floorplan schemes for reducing the peak temperature in 3D multi-core processors. According to our simulation results, the proposed floorplan schemes are expected to mitigate the thermal problems of 3D multi-core processors efficiently, resulting in improved reliability. Moreover, processor performance improves by reducing the performance degradation due to DTM techniques. Power consumption also can be reduced by decreased temperature and reduced execution time.

Motion Estimation and Mode Decision Algorithm for Very Low-complexity H.264/AVC Video Encoder (초저복잡도 H.264 부호기의 움직임 추정 및 모드 결정 알고리즘)

  • Yoo Youngil;Kim Yong Tae;Lee Seung-Jun;Kang Dong Wook;Kim Ki-Doo
    • Journal of Broadcast Engineering
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    • v.10 no.4 s.29
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    • pp.528-539
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    • 2005
  • The H.264 has been adopted as the video codec for various multimedia services such as DMB and next-generation DVD because of its superior coding performance. However, the reference codec of the standard, the joint model (JM) contains quite a few algorithms which are too complex to be used for the resource-constraint embedded environment. This paper introduces very low-complexity H.264 encoding algorithm which is applicable for the embedded environment. The proposed algorithm was realized by restricting some coding tools on the basis that it should not cause too severe degradation of RD-performance and adding a few early termination and bypass conditions during the motion estimation and mode decision process. In case of encoding of 7.5fps QCIF sequence with 64kbpswith the proposed algorithm, the encoder yields worse PSNRs by 0.4 dB than the standard JM, but requires only $15\%$ of computational complexity and lowers the required memory and power consumption drastically. By porting the proposed H.264 codec into the PDA with Intel PXA255 Processor, we verified the feasibility of the H.264 based MMS(Multimedia Messaging Service) on PDA.