• Journal of Korea Society of Digital Industry and Information Management
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• v.16 no.2
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• pp.1-9
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• 2020

Many cryptographic and error control coding algorithms rely on finite field GF(2m) arithmetic. Hardware implementation of these algorithms needs an efficient realization of finite field arithmetic operations. Finite field multiplication is complicated among the basic operations, and it is employed in field exponentiation and division operations. Various algorithms and architectures are proposed in the literature for hardware implementation of finite field multiplication to achieve a reduction in area and delay. In this paper, a low area and delay efficient semi-systolic multiplier over finite fields GF(2m) using the modified Montgomery modular multiplication (MMM) is presented. The least significant bit (LSB)-first multiplication and two-level parallel computing scheme are considered to improve the cell delay, latency, and area-time (AT) complexity. The proposed method has the features of regularity, modularity, and unidirectional data flow and offers a considerable improvement in AT complexity compared with related multipliers. The proposed multiplier can be used as a kernel circuit for exponentiation/division and multiplication.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.932-934
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• 2006

A relationship between discharge delay time and the aging method were investigated: A-Y (Address electrode - Scan electrode) aging and conventional X-Y(Common electrode - Scan electrode) aging with the variation of sustain voltage beyond self-erasing discharge. Although A-Y aging decreases discharge delay time, it has several drawbacks like non-uniformity of discharge, degradation of luminous efficiency and a color temperature. In a conventional aging condition which is carried out near the mid-margin voltage, discharge delay time is short in low voltage and high frequency condition. As an alternative to conventional voltage aging, high voltage aging is suggested which is carried out at self-erasing sustain voltage region. High voltage aging shows lower discharge delay time and fast aging speed than conventional voltage aging.

• Journal of Institute of Control, Robotics and Systems
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• v.4 no.5
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• pp.630-635
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• 1998

The objective of this paper is to propose a new efficient technique for the estimation of time-delay parameters using wavelet theory and third-order cumulants, yielding good performance even in the case of low SNR. In particular, band-limited non-Gaussian signals with non-zero skewness and spatially correlated Gaussian noises are considered here. The approach is based on the fact that the effects of spatially correlated Gaussian noises on time-delay estimation can be reduced by using the projection sequences (based on the redundant wavelet decomposition) of given measurements in the higher-order cumulant domain. Finally, the performance of the proposed approach is demonstrated using simulations.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.9
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• pp.1-9
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• 1994

Through the low orbit GPS satellite for a 3-dimensional real time position detechtion can be achieved anywhere. Utilizing the GPS sate llite detection values an analysis of the varing characteristics of the ionosphere can be achieved, and by calculating the correlation relationship of the position detection error and the ionospheric time delay characteristics, an advanced algorithm technique can be developed. Computer simulation of the developed algorithm for defining the corelation between the position detection error and the varing ionospheric time delay charcteristics has been proceeded. The results of simulation reveal the fact that the varing characteristics of the ionosphere nearly match the actual ionospheric time delay characteristics.

• Journal of electromagnetic engineering and science
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• v.15 no.2
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• pp.76-81
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• 2015

This paper presents a design of a transmission line negative group delay (NGD) circuit with multiple pole characteristics. By inserting an additional transmission line into a conventional NGD circuit, the proposed circuit provides further design parameters to obtain wideband group delay (GD) and to help reduce signal attenuation. As a result, the number of gain compensating amplifiers can be reduced, which can contribute to stable operation when integrated into RF systems. The multiple pole characteristics can provide wider NGD bandwidth and can be obtained by connecting resonators with slightly different center frequencies separated by quarter-wavelength transmission lines. For experimental validation, an NGD circuit with two poles GD characteristic is designed, simulated, and measured.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.42 no.4 s.304
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• pp.111-118
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• 2005

In this paper, we employ the modulation technique for improving the characteristics of beamformer in the low frequencies and thus improving the overall noise reduction performance. In the 1-dimensional uniform linear microphone arrays, we can suppress the narrowband noise component using the delay-and-sum beamforming. But, for the wideband noise signal, the delay-and-sum beamformer does not work well for the reduction of low frequency component because the inter-element spacing is usually set to avoid spatial aliasing at high frequencies. Hence, the beamwidth is not uniform with respect to each frequency and it is usually wider at the low frequencies. In order to obtain the beamwidth independent of frequencies, subarray systems[1][2][3][4] and multi-beamforming[5] have been proposed. However these algorithms need large space and more microphones since they are based on the theory that the size of the array is proportional to the wavelength of the input signal. In the proposed beamformer, we reduce the low frequency noise by using modulation technique that does not need additional sensors or non-uniform spacing. More Precisely, the array signals are split into subbands, and the low frequency components are shifted to high frequencies by modulation and reduced by the delay-and-sum beamforming techniques with small size microphone array. Experimental results show that the proposed technique Provides better performance than the conventional ones, especially in the low frequency band.

• Science of Emotion and Sensibility
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• v.11 no.2
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• pp.227-234
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• 2008

Graphic and sounds are mainly used for presenting digital content as general. It has been reported that the reality of digital contents was improved by adding haptic factor to the contents of graphic and sounds. Therefore, various haptic system have recently been developed for implementing haptic sensation into digital contents. However, the delay of haptic display sometimes happens due to low hardware performance and causes to deteriorate reality of digital contents. The delay effect on reality has been important to be determined for presenting digital contents with haptic system. Therefore, this study is to find the effect on user's cognition of digital contents evoking both visual and haptic sensation. Eight university students performed 4 repetitive tasks of pushing cube under the two conditions of visual and haptic delay. The delay time of each condition were set 0.5, 1.0, 2.0 and 4.0 second. As the result, both haptic and visual delay were negatively influenced user's recognition while visual delay showed more dominant effect on user's recognition than haptic delay.

• The Journal of Industrial Distribution & Business
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• v.11 no.12
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• pp.39-45
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• 2020

Purpose: The stock price delay phenomenon refers to a phenomenon in which stock prices do not immediately reflect corporate information and the reflection is delayed. A prior study reported that the stock price delay phenomenon appears strongly when the quality of corporate information is low (Callen, Khan, & Lu, 2013). The purpose of the internal accounting control system is to improve the reliability of accounting information. Specifically, the more professionals such as certified public accountants are placed in the internal accounting control system, the more information is prevented from being distorted, so the occurrence of stock price delay will decrease. Research design, data and methodology: In this study, companies listed on the securities market from 2012 to 2016 were selected as a sample to analyze whether the stock price delay phenomenon is alleviated as accounting experts are assigned to the internal accounting control system. The internal control personnel data were collected in the "Internal Accounting Control System Operation Report" attached to the business report of each company of the Financial Supervisory Service's Electronic Disclosure System(DART). The measurement method of the stock price delay phenomenon was referred to the study of Hou and Moskowitz (2005). The final sample used in the study is 2,641 firm-years. Results: It was found that companies with certified accountants in the internal accounting control system alleviate the stock price delay phenomenon. This result can be interpreted as increasing the speed at which corporate information is reflected in the stock price by improving the reliability of information disclosed in the market by the placement of experts in the system. Conclusions: The results of this study suggest that accounting professionals assigned to the internal accounting control system are playing a positive role in providing high-quality information to the market. In this study, focusing on the fact that the speed at which corporate information is reflected in the stock price is very important for the stakeholders in the capital market, we find that having a certified public accountant in the internal accounting control system alleviates the stock price delay phenomenon.

• Journal of Korea Society of Industrial Information Systems
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• v.22 no.1
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• pp.53-59
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• 2017

This Paper Proposes a New High-speed Design Methodology for Delay Insensitive Asynchronous Circuits Combining with a Pseudo-NMOS Structure used for High Performance in Synchronous Circuits. Null Convention Logic(NCL) of Conventional Delay-Insensitive Asynchronous Design Methodologies has many Advantages of High Reliability, Low Power Consumption, and Easy Design Reuses not Dependant on Semiconductor Technology. However. the Conventional NCL Gates has a Complicated Stack Structure, so it Suffers from Increased Circuit Delay. Therefore, a New NCL Gates and its Pipeline Structure for High Performance, and the Proposed Methodology has been Designed and Evaluated by a $4{\times}4$ Multiplier Designed using SK-Hynix 0.18 um CMOS Technology. The Experimental Results are Compared with a Conventional NCL in Terms of Power and Delay and shows that the Propagation Delay of the Proposed Multiplier is Reduced by 85% Compared with the Conventional NCL Multiplier.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.6
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• pp.8-15
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• 2003

In this paper, the issue of the differential ring oscillator in designing low phase noise is linearity improvement of delay cell's load resistor. A novel differential delay cell that improves on the Maneatis load is proposed. The linearity improvement of load resistor results in lower phase noise in ring oscillator. For comparison of the phase noise characteristics, Ali Hajimiri's phase noise model is used. In order to have a low ISF(impulse sensitivity function), it is important to have a symmetry between rise time and fall time of oscillation waveform. The ISF value of ing oscillator based on the proposed delay cell is lower than that of the existing ring oscillators. Due to this result, the phase noise is improved by 2~3dBc/Hz for the same power dissipation and oscillation frequency.