• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.12
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• pp.2136-2139
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• 2008

Chaotic oscillators can generate wide-band signals and the spectrum characteristics of the wide-band signals are not changed by switching on and off the output power of the oscillators. When communication systems use a chaotic oscillator, the communication system need not a local oscillator and a mixer used in conventional transceivers. Therefore the configuration of a communication system using a chaotic oscillator is simple and have the characteristics of low-power consumption. In this paper we design and implement a chaotic oscillator. And the test results of the implemented chaotic oscillator for UWB systems are presented. The implemented chaotic oscillator has -8.11dBm of the output power with 500MHz channel bandwidth at 3.4GHz of the center frequency and has about 410MHz of -10dB bandwidth.

• Journal of Power Electronics
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• v.19 no.1
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• pp.179-189
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• 2019

Four-quadrant converters (4QCs) are widely used as AC-DC power conversion interfaces in many areas. A control delay commonly exists in the digital implementation process of 4QCs, especially for high power 4QCs with a low switching frequency. This usually results in alternating current distortion, increased current harmonic content and system instability. In this paper, the control delay is divided into a computation delay and a PWM delay. The impact of the control delay on the performance of a 4QC is briefly analyzed. To obtain a fundamental value of AC current that is as accurately as possible, a specific sampling method considering the PWM pattern is introduced. Then a current predictive control based on a modified z-transform is proposed, which is effective in reducing the control delay and easy in terms of digital implementation. In addition, it does not depend on object models and parameters. The feasibility and effectiveness of the proposed predictive current control method is verified by simulation and experimental results.

• Journal of Power Electronics
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• v.19 no.4
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• pp.1000-1010
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• 2019

The use of internal-model-based linear controller, such as resonant controller, is a well-established technique for the current control of grid-connected systems. Attractive properties for resonant controllers include their two-sequence tracking ability, the simple control structure, and the reduced computational burden. However, in the case of continuous-designed resonant controller, the transient performance is inevitably degraded at a low switching frequency. Moreover, available design methods for resonant controller is not able to realize the direct design of transient performances, and the anticipated transient performance is mainly achieved through trial and error. To address these problems, the zero-order-hold (ZOH) characteristic and inherent time delay in digital control systems are considered comprehensively in the design, and a corresponding hold-equivalent discrete model of the grid-connected converter is then established. The relationship between the placement of closed-loop poles and the corresponding transient performance is comprehensively investigated to realize the direct mapping relationship between the control gain and the transient response time. For the benefit of automatic tuning and real-time adaption, analytical expressions for controller gains are derived in detail using the required transient response time and system parameters. Simulation and experimental results demonstrate the validity of the proposed method.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.1
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• pp.15-24
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• 2012

In this paper, we suggest the dynamic-response-free SMPS using a new high-resolution DPWM generator based on switched-capacitor delay technique. In the proposed system, duty ratio of DPWM is controlled by voltage slope of an internal capacitor using switched-capacitor delay technique. In the proposed circuit, it is possible to track output voltage by controlling current of the internal capacitor of the DPWM generator through comparison between the feedback voltage and the reference voltage. Therefore the proposed circuit is not restricted by the dynamic-response characteristic which is a problem in the existing SMPS using the closed-loop control method. In addition, it has great advantage that ringing phenomenon due to overshoot/undershoot does not appear on output voltage. The proposed circuit can operate at switching frequencies of 1MHz~10MHz using internal operating frequency of 100 MHz. The maximum current of the core circuit is 2.7 mA and the total current of the entire circuit including output buffer is 15 mA at the switching frequency of 10 MHz. The proposed circuit has DPWM duty ratio resolution of 0.125 %. It can accommodate load current up to 1 A. The maximum ripple of output voltage is 8 mV. To verify operation of the proposed circuit, we carried out simulation with Dongbu Hitek BCD $0.35{\mu}m$ technology parameter.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.11A
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• pp.929-935
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• 2003

An analog/digital mixed mode ASIC for network synchronization of ATM switching system has been designed and fabricated. This ASIC generates a 234.7/46.94 ㎒ system clock and 77.76/19.44 ㎒ user clock using 46.94 ㎒ transmitted clocks from other systems. It also includes digital circuits for checking and selecting of the transmitted clocks. For effective ASIC design, full custom technique is used in 2 analog PLL circuits design, and standard cell based technique is used in digital circuit design. Resistors and capacitors for analog circuits are specially designed which can be fabricated in general CMOS technology, so the chip can be implemented in 0.8$\mu\textrm{m}$ digital CMOS technology with no expensive. Testing results show stable 234.7 ㎒ and 19.44 ㎒ clocks generation with each 4㎰ and 17㎰ of low ms jitter.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.38 no.2
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• pp.1-11
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• 2001

In this paper, a chattering alleviation VSS controller for the sinusoidal type BLDC motor is designed. Dead Zone function is proposed to change the chattering occurring in the transient state from high frequency to low frequency and time varying gains arc applied for the control input to eliminate the steady state excessive chattering in the conventional ISM. The proposed Dead Zone function represents the sliding layer composed of two switching surfaces and if a state vector exists in this layer, the chattering don't occur. Simulation and experimental results confirm the useful effects of the above algorithm.

• The Transactions of the Korean Institute of Power Electronics
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• v.6 no.2
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• pp.125-131
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• 2001

This paper presents a application of vector control strategy to 1.2MVA traction drive for railway vehicle. The vector control required the control of the phase and amplitude of output voltage vector. But in case of traction system for railway vehicle, the one-pulse mode is used at high speed region in order to utilize the link voltage fully. So it is impossible to control the flux and torque axis current instantaneously and independently in the region. So this paper proposes a mixed control algorithm, where the vector control strategy at low speed region and slip-frequency control strategy at high speed region is used. And precise switching technique between the two different control strategy is proposed. The proposed strategy is verified by experimental results with a 1.2MVA traction drive system with four 210kW induction motors.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.21 no.2
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• pp.54-63
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• 2007

Recently, a fuel cell with low voltage and high current output characteristics is remarkable for new generation system. It needs both a DC-DC step-up converter and DC-AC inverter to be used in fuel cell generation system. Therefor, this paper, consists of an isolated DC-DC converter to boost the fuel cell voltage $380[V_{DC}]$ and a PWM inverter with LC filter to convent the DC voltage to single-phase $220[V_{AC}]$. Expressly, a tapped inductor filter with freewheeling diode is newly implemented in the output filter of the proposed high frequency isolated ZVZCS PWM DC-DC converter to suppress circulating current under the wide output voltage regulation range, thus to eliminate the switching and transformer turn-on/off over-short voltage or transient phenomena. Besides the efficiency of 93-97[%]is obtained over the wide output voltage regulation ranges and load variations.

• Journal of IKEEE
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• v.12 no.3
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• pp.176-183
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• 2008

The high efficiency power management IC(PMIC) with DTMOS(Dynamic Threshold voltage MOSFET) switching device is proposed in this paper. PMIC is controlled with PWM control method in order to have high power efficiency at high current level. DTMOS with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuits consist of a saw-tooth generator, a band-gap reference circuit, an error amplifier and a comparator circuit as a block. The Saw-tooth generator is made to have 1.2 MHz oscillation frequency and full range of output swing from ground to supply voltage(VDD:3.3V). The comparator is designed with two stage OP amplifier. And the error amplifier has 70dB DC gain and $64^{\circ}$ phase margin. DC-DC converter, based on Voltage-mode PWM control circuits and low on-resistance switching device, achieved the high efficiency near 95% at 100mA output current. And DC-DC converter is designed with LDO in stand-by mode which fewer than 1mA for high efficiency.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.7
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• pp.11-16
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• 2016

Silicon carbide (SiC) has received significant attention over the past decade because of its high-voltage, high-frequency and high-thermal reliability in devices compared to silicon. Especially, a SiC Schottky barrier diode (SBD) is most often used in low-voltage switching and low on-resistance power applications. However, electric field crowding at the contact edge of SBDs induces early breakdown and limits their performance. To overcome this problem, several edge termination techniques have been proposed. This paper proposes an improvement in the breakdown voltage using a double-field-plate structure in SiC SBDs, and we design, simulate, fabricate, and characterize the proposed structure. The measurement results of the proposed structure, demonstrate that the breakdown voltage can be improved by 38% while maintaining its forward characteristics without any change in the size of the anode contact junction region.