• Title/Summary/Keyword: Low Power Noise

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Design of a Low-Power Low-Noise Clock Synthesizer PLL (저전력 저잡음 클록 합성기 PLL 설계)

  • Park, J.K.;Shim, H.C.;Park, J.T.;Yu, C.G.
    • Proceedings of the KIEE Conference
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    • 2006.10c
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    • pp.479-481
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    • 2006
  • This paper describes a 2.5V, 320MHz low-noise and low-power Phase Locked Loop(PLL) using a noise-rejected Voltage Controlled ring Oscillator(VCO) fabricated in a TSMC 0.25um CMOS technology. In order to improve the power consumption and oscillation frequency of the PLL, The VCO consist of three-stage fully differential delay cells that can obtain the characteristic of high speed, low power and low phase noise. The VCO operates at 7MHz -670MHz. The oscillator consumes l.58mA from a 320MHz frequency and 2.5V supply. When the PLL with fully-differential ring VCO is locked 320MHz, the jitter and phase noise measured 26ps (rms), 157ps (p-p) and -97.09dB at 100kHz offset. We introduce and analysis the conditions in which ring VCO can oscillate for low-power operation.

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Design of Low Noise Amplifier Utilizing Input and Inter Stage Matching Circuits (다양한 매칭 회로들을 활용한 저잡음 증폭기 설계 연구)

  • Jo, Sung-Hun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.25 no.6
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    • pp.853-856
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    • 2021
  • In this paper, a low noise amplifier having high gain and low noise by using input and inter stage matching circuits has been designed. A current-reused two-stage common-source topology is adopted, which can obtain high gain and low power consumption. Deterioration of noise characteristics according to the source inductive degeneration matching is compensated by adopting additional matching circuits. Moreover trade-offs among noise, gain, linearity, impedance matching, and power dissipation have been considered. In this design, 0.18-mm CMOS process is employed for the simulation. The simulated results show that the designed low noise amplifier can provide high power gain and low noise characteristics.

The Analysis on Audible Noise Level and Cooling Performance for the Low Noise Cooling Fan of Power Transformers (전력용 변압기 저소음 냉각팬의 소음레벨 및 냉각성능 분석)

  • Koo, Kyo-Sun;Kweon, Dong-Jin
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.23 no.8
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    • pp.110-115
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    • 2009
  • Recently, there has been a growing global interest in environmental conservation, and the field of electric power equipment has been working to become more environment-friendly. Accordingly, the low noise cooling fan of power transformers was developed through the improvement of blade shape. These are expected to apply to existing power transformers and low noise transformers. It is essential for low noise fan to possess good cooling performance as well as low audible noises. But, there was not analysis on the audible noise level and the cooling performance for low noise cooling fans until present. In this paper, we measure the audible noise level and the flow rate of low noise cooling fans to inspect the performance, Also, we confirmed that the low noise cooling fan is available to apply to power transformers through temperature rise tests of power transformers.

Study on Noise and Low Frequency Noise generated by Wind Power plant(Wind Farm) (풍력발전시설에서 발생하는 환경소음 및 저주파음에 관한 연구)

  • Park, Young-Min;Choung, Tae-Ryang;Son, Jin Hee
    • Journal of Environmental Impact Assessment
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    • v.20 no.4
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    • pp.425-434
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    • 2011
  • The energy produced by wind power generation is a clean energy product because it is acquired by using renewable resource. Wind power plants("wind farms), in Korea, have been built and operated as 345.6MW facilities from 2001 until now 2009. Nevertheless, environmental issues regarding construction of wind power plants have arisen. accordingly it is time to consider the environmental and social issues of wind power in accordance with the government's policy objectives of increased wind power production. In this study, we investigated the influence that noise and low frequency noise caused by Wind power plants have on neighborhood and residents. We also sought solutions to these issues. In order to analyze the issues of wind power facilities, we compared and examined precedents and the solutions for noise and low frequency noise in Europe, the United states and Japan. We intended to examine the influences of wind power facilities and propose alternative in dealing with these issues.

A Study on Low Area/Power Schemes of Noise Generation System (잡음 발생기의 저면적, 저전력 방안에 관한 연구)

  • 이창기
    • Journal of the Korea Computer Industry Society
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    • v.4 no.4
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    • pp.433-442
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    • 2003
  • The performance of communication systems should be tested against a set of requirements. To this end, noise generation systems are used to generate noise signals with specified characteristics. In recent study, noise generation system using DCT outperforms the conventional noise generation system when a noise model requires complicated PSD(Power Spectral Density) specifications. In this paper low area/power structures of non-DCT block in DCT-based noise generation system are proposed. Simulation results show that the low area structure results in area reduction by 61-64% and the low power structure achieves power reduction by 88-89% except DCT blocks.

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A Low Power CMOS Low Noise Amplifier for UWB Applications (UWB용 저전력 CMOS 저잡음 증폭기 설계)

  • Lhee, Jeong-Han;Oh, Nam-Jin
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.545-546
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    • 2008
  • This paper presents a low power CMOS low noise amplifier for UWB applications. To reduce the power consumption, two cascode amplifiers was stacked in DC. Designed with $0.18-{\mu}m$ CMOS technology, the proposed LNA achieves 20dB flat gain, below 3dB noise figure, and the power consumption of 5.2mW from a 1.8 V supply voltage.

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A Fully-Integrated Low Power K-band Radar Transceiver in 130nm CMOS Technology

  • Kim, Seong-Kyun;Cui, Chenglin;Kim, Byung-Sung;Kim, SoYoung
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.12 no.4
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    • pp.426-432
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    • 2012
  • A fully-integrated low power K-band radar transceiver in 130 nm CMOS process is presented. It consists of a low-noise amplifier (LNA), a down-conversion mixer, a power amplifier (PA), and a frequency synthesizer with injection locked buffer for driving mixer and PA. The receiver front-end provides a conversion gain of 19 dB. The LNA achieves a power gain of 15 dB and noise figure of 5.4 dB, and the PA has an output power of 9 dBm. The phase noise of VCO is -90 dBc/Hz at 1-MHz offset. The total dc power dissipation of the transceiver is 142 mW and the size of the chip is only $1.2{\times}1.4mm^2$.

Design of High Gain Low Noise Amplifier (2.4GHz 고이득 저잡음 증폭기 설계)

  • 손주호;최석우;윤창훈;김동용
    • Proceedings of the IEEK Conference
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    • 2002.06b
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    • pp.309-312
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    • 2002
  • In this paper, we discuss the design of high gain low noise amplifier by using the 0.2sum CMOS technology. A cascode inverter is adopted to implement the low noise amplifier. The proposed cascode inverter LNA is one stage amplifier with a voltage reference and without choke inductors. The designed 2.4GHz LNA achieves a power gain of 25dB, a noise figure of 2.2dB, and power consumption of 255㎽ at 2.5V power supply.

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A Low Close-in Phase Noise 2.4 GHz RF Hybrid Oscillator using a Frequency Multiplier

  • Moon, Hyunwon
    • Journal of Korea Society of Industrial Information Systems
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    • v.20 no.1
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    • pp.49-55
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    • 2015
  • This paper proposes a 2.4 GHz RF oscillator with a very low close-in phase noise performance. This is composed of a low frequency crystal oscillator and three frequency multipliers such as two doubler (X2) and one tripler (X3). The proposed oscillator is implemented as a hybrid type circuit design using a discrete silicon bipolar transistor. The measurement results of the proposed oscillator structure show -115 dBc/Hz close-in phase noise at 10 kHz offset frequency, while only dissipating 5 mW from a 1-V supply. Its close-in phase noise level is very close to that of a low frequency crystal oscillator with little degradation of noise performance. The proposed structure which is consisted of a low frequency crystal oscillator and a frequency multiplier provides new method to implement a low power low close-in phase noise RF local oscillator.

A MedRadio-Band Low Power Low Noise Amplifier for Medical Devices (의료기기용 MedRadio 대역 저전력 저잡음 증폭기)

  • Kim, Taejong;Kwon, Kuduck
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.9
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    • pp.62-66
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    • 2016
  • This paper presents a MedRadio-band low power low noise amplifier for Medical Devices. A proposed MedRadio-band low power low noise amplifier adopts a current-reuse resistive feedback topology to increase overall gm and reduce power consumption. The gain of the LNA increases by the Q-factor of the additional series RLC input matching network, and its noise figure is minimized by the similar factor. Furthermore, it consumes low power because of low supply voltage and current reuse technique. By exploiting the $g_m$-booting and matching network property, the proposed MedRadio-band low noise amplifier achieves a noise figure of 0.85 dB, a voltage gain of 30 dB, and IIP3 of -7.9 dBm while consuming 0.18 mA from a 1 V supply voltage in $0.13{\mu}m$ CMOS technology.