• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.11
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• pp.78-89
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• 2013

This paper proposes a high-throughput and multi-mode quasi-cyclic (QC) low-density parity-check (LDPC) decoder based on a fully parallel structure. The proposed QC-LDPC decoder employs the fully parallel structure to provide very high throughput. The high interconnection complexity, which is the general problem in the fully parallel structure, is solved by using a broadcasting-based sum-product algorithm and proposing a low-complexity cyclic shift network. The high complexity problem, which is caused by using a large amount of check node processors and variable node processors, is solved by proposing a combined check and variable node processor (CCVP). The proposed QC-LDPC decoder can support the multi-mode decoding by proposing a routing-based interconnection network, the flexible CCVP and the flexible cyclic shift network. The proposed QC-LDPC decoder is operated at 100 MHz clock frequency. The proposed QC-LDPC decoder supports multi-mode decoding and provides 8.1 Gbps throughput for a (1944, 1620) QC-LDPC code.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.12
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• pp.1745-1747
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• 2016

In this paper, we propose a construction method of irregular quasi-cyclic low-density parity-check codes based on perfect difference families with various block sizes. The proposed codes have advantages in that they support various values with respect to code rate, length, and degree distribution. Also, this construction enables very short lengths which are usually difficult to be achieved by a random construction. We verify via simulations the error-correcting performance of the proposed codes.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.10 s.101
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• pp.965-972
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• 2005

In this paper, we first review LDPC codes in general and a belief propagation algorithm that works in logarithm domain. LDPC codes, which is chosen for second generation digital video broadcasting standard, are required a large number of computation due to large size of coded block and iteration. Therefore, we presented two kinds of low computational algorithm for LDPC codes. First, sequential decoding with partial group is proposed. It has same H/W complexity, and fewer number of iteration's are required at same performance in comparison with conventional decoder algerian. Secondly, early detection method for reducing the computational complexity is proposed. Using a confidence criterion, some bit nodes and check node edges are detected early on during decoding. Through the simulation, we knew that the iteration number are reduced by half using subset algorithm and computational complexity of early detected method is about $50\%$ offs in case of check node update, $99\%$ offs in case of check node update compared to conventional scheme.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.12
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• pp.2791-2797
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• 2010

In recent years, the goal of providing high speed wireless data services has generated a great amount of interest among the research community. Several researchers have shown that the capacity of the system, in the presence of flat Rayleigh fading, improves significantly with the use of combined MIMO and LDPC. To feed the soft values to LDPC decoder, the soft values must be calculated from multiple transmitter and receiver antennas in Rayleigh fading channel. It requires high computational complexity to get the soft symbols by increasing number of transmitter and receiver antennas. Therefore, this thesis proposed on effective algorithm for calculation of soft values from multiple antennas based on LLR. As result, This thesis shows that maximum 61% of computational complexity is reduced with a little loss of performance.

• IEMEK Journal of Embedded Systems and Applications
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• v.4 no.4
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• pp.195-200
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• 2009

As 4G mobile communication systems require high transmission rates with reliability, the need for efficient error correcting code is increasing. In this paper, a novel LDPC (Low Density Parity Check) decoder is introduced. The LDPC code is one of the most popular error correcting codes. In order to improve performance of the LDPC decoder, we use SNR (Signal-to-Noise Ratio) estimation results to adjust coefficients of modified UMP-BP (Uniformly Most Probable Belief Propagation) algorithm which is one of widely-used LDPC decoding algorithms. An advantage of Modified UMP-BP is that it is amenable to implement in hardware. We generate the optimal values by simulation for various SNRs and coefficients, and the values are stored in a look-up table. The proposed decoder decides coefficients of the modified UMP-BP based on SNR information. The simulation results show that the BER (Bit Error Rate) performance of the proposed LDPC decoder is better than an LDPC decoder using a conventional modified UMP-BP.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2009.11a
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• pp.25-27
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• 2009

1962년 R.G Gallager가 제안한 LDPC(Low Density Parity Check)부호는 Shannon의 채널 용량의 한계에 근접한 우수한 오류정정 부호이다. 우수한 LDPC부호 생성 조건 중 가장 중요한 부분은 바로 최소 사이클 길이(girth)를 최대화 하는 과정인데, PEG(Progressive Edge Growth)알고리듬은 이 조건을 만족시키는 우수한 알고리듬으로 인정받고 있다. 이후 높은 SNR범위에서 PEG알고리듬의 성능을 개선한 IPEG (Improved PEG) 알고리듬을 포함한 다양한 알고리듬이 제안 되었다.본 논문은 PEG와 IPEG 알고리듬을 이용해 생성한 LDPC 부호를 이용하여 부호길이, 부호율을 변화시키면서 실험하여 그 결과를 비교 분석하였고, 더 좋은 성능을 가질 수 있는 알고리듬에 대해 논의한다.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2011.07a
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• pp.284-286
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• 2011

LDPC(low density parity check) 부호는 낮은 복잡성과 Shannon의 한계에 근접하는 오류 정정 능력을 보이기 때문에 turbo 부호와 함께 많은 응용분야에 적용되고 있다. 본 논문에서는 분산 동영상 부호화(distributed video coding: DVC) 시스템을 위한 부호율 적응적인(rate adaptive) LDPC 부호를 설계하기 위하여 패리티 점검 노드를 병합하는 방법을 제안한다. ACE(approximation cycles EMD) 알고리즘을 기반으로 효율적인 LDPC 부호를 설계하고 부호율 적응적인 특성을 갖기 위해 일정한 범위를 지정하고 지정된 범위에 따라 패리티 점검 노드를 병합한다. 그리고 ACE 알고리즘의 계수와 degree distribution을 변화시키면서 성능을 해석한다.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.10 no.6
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• pp.2648-2668
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• 2016

Modern mobile devices are equipped with various accelerated processing units to handle computationally intensive applications; therefore, Open Computing Language (OpenCL) has been proposed to fully take advantage of the computational power in heterogeneous systems. This article introduces a parallel software decoder of Low Density Parity Check (LDPC) codes on an embedded heterogeneous platform using an OpenCL framework. The LDPC code is one of the most popular and strongest error correcting codes for mobile communication systems. Each step of LDPC decoding has different parallelization characteristics. In the proposed LDPC decoder, steps suitable for task-level parallelization are executed on the multi-core central processing unit (CPU), and steps suitable for data-level parallelization are processed by the graphics processing unit (GPU). To improve the performance of OpenCL kernels for LDPC decoding operations, explicit thread scheduling, vectorization, and effective data transfer techniques are applied. The proposed LDPC decoder achieves high performance and high power efficiency by using heterogeneous multi-core processors on a unified computing framework.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.2C
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• pp.148-154
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• 2010

In this paper, we first review LDPC codes in general and a belief propagation algorithm that works in logarithm domain. LDPC codes, which is chosen 802.11n for wireless local access network(WLAN) standard are required a large number of computation due to large size of coded block and iteration. Therefore, we presented three kinds of low computational algorithm for LDPC codes. First, sequential decoding with partial group is proposed. It has same H/W complexity, and fewer number of iteration's are required at same performance in comparison with conventional decoder algorithm. Secondly, we have apply early stop algorithm. This method is reduced number of unnecessary iteration. Third, early detection method for reducing the computational complexity is proposed. Using a confidence criterion, some bit nodes and check node edges are detected early on during decoding. Through the simulation, we knew that the iteration number are reduced by half using subset algorithm and early stop algorithm is reduced more than one iteration and computational complexity of early detected method is about 30% offs in case of check node update, 94% offs in case of check node update compared to conventional scheme.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.5
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• pp.504-511
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• 2016

In this paper, MIMO system based on turbo equalization techniques which LDPC codes were outer code and space time trellis codes (STTC) were employed as an inner code are studied. LDPC decoder and STTC decoder are connected through the interleaving and de-interleaving that updates each other's information repeatedly. In conventional turbo equalization of MIMO system, BCJR decoder which decodes STTC coded bits required two-bit wise decoding processing. Therefore duo-binary turbo codes are optimal for MIMO system combined with STTC codes. However a LDPC decoder requires bit unit processing, because LDPC codes can't be applied to these system. Therefore this paper proposed turbo equalization for MIMO system based on LDPC codes combined with STTC codes. By the simulation results, we confirmed performance of proposed turbo equalization model was improved about 0.6dB than that of conventional LDPC codes.