• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.7
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• pp.1390-1406
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• 1994

This study deals with the DMCLP(Delay constrained Minimum Cost Loop Problem)-one of problems arising in the design of local access computer networks. The problem consists of finding a set of rings to satisfy the traffic requirements of end user terminals. In the problem, the objective is to minimize the total link cost. This paper presents heuristic algorithm which consists of two phases for this problem, under the constraints that the number of nodes served by a single ring is limited and network mean delay is dropped within the desired time. The algorithm is derived using the clusters obtained by the existing MCLP(Minimum Cost Loop Problem) algorithm and a trade-off criterion explained in the paper. Actually, simulation results in that the proposed algorithm in this paper produces better solution than the existing MCLP algorithm modified. In addition, the algorithm has the relatively short running time.

• The Research Journal of the Costume Culture
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• v.9 no.3
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• pp.447-457
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• 2001

Moliere completed classical French comedy by combining farce and commedia dell\`arte. Moliere believed that it was a plays obligation to give a lesson and entertainment. Moliere recreated commedia dell\`arte\`s typical acting patterns and characters in his work. He created with Lully comedie ballet that combined ballet and comedie for taste of Louis 14. Les precieuses ridicules critically displayed women at that time. Both contemporary high status women\`s custom and behavior were the targets of the author\`s synical criticism. There are three notable clothing imageries are shown in this work. First, Moliere used a variety of items in order to show emptiness of noble at that time. Items are ribbon and loop decorated rhingrave, feather decorated hat, perfumed wig and glove, lace covered canon and flower decorated shoes. Second, the author showed people\`s stutus through their clothes. Last, the author used clothing used clothing as a metaphor for hypocrisy. Thus when he said “take off the clothes” he meant take off hypocrisy and return truth.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.9 s.339
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• pp.35-40
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• 2005

A digitally controlled phase-locked loop (DCPLL) is described. The DCPLL has basically the same structure as a conventional analog PLL except for a tracking analog-to-digital converter (ADC). The tracking ADC generates the control signal for voltage controlled oscillator. Since the DCPLL employs neither digitally controlled oscillator nor time-to-digital converter-the key building blocks of digital PLL (DPLL), there is no need for the 03de-off between jitter, power consumption and silicon area. The DCPLL was implemented in a $0.18\mu$m CMOS process and the active area is 1mm $\times$0.35 mm The DCPLL consumes S9mW during the normal opuation and $984\{mu}W$ during the power-down mode from a 1.8V supply. The DCPLL shows 16.8ps ms jitter.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.7C
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• pp.735-742
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• 2006

In this paper, we explain the operation scheme and fixed-point design method of DFE (Digital Front End), which performs DC offset compensation, automatic frequency control, and automatic gain control over the input signal to the UE (User Equipment) receiver of IEEE 802.16e OFDMA-TDD system. Then, we analyze the performance of DFE under ITU-R M. 1225 Veh-A 60km/h channel environment. To optimize the fixed-point design of DFE, we reduce the number of bit resulted from calculation without performance degradation, leading to the decreased complexity of the operation in H/W, and design the Loop filter with considering trade-off between the Acquisition time and the Stability.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.50 no.10
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• pp.479-485
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• 2001

In this paper, we introduce a charge pump phase-locked loop (PLL) architecture which employs a precharge phase frequency detector (PFD) and a sequential PFD to achieve a high frequency operation and a fast acquisition. Operation frequency is increased by using the precharge PFD when the phase difference is within $-{\pi}{\sim}{\pi}$ and acquisition time is shortened by using the sequential PFD and the increased charge pump current when the phase difference is larger than ${\pm}{\pi}$. So error detection range of the proposed PLL structure is not limited to $-{\pi}{\sim}{\pi}$ and a high frequency operation and a higher speed lock-up time can be achieved. The proposed PLL was designed using 1.5 ${\mu}m$ CMOS technology with 5V supply voltage to verify the lock in process. The proposed PLL shows successful acquisition for 200 MHz input frequency. On the other hand, the conventional PLL with the sequential PFD cannot operate at up to 160MHz. Moreover, the lock-up time is drastically reduced from 7.0 ${\mu}s\;to\;2.0\;{\mu}s$ only if the loop bandwidth to input frequency ratio is regulated by the divide-by-4 counter during the acquisition process. By virtue of this dual PFDs, the proposed PLL structure can improve the trade-off between acquisition behavior and locked behavior.

• Proceedings of the KIEE Conference
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• 1987.11a
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• pp.79-81
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• 1987

Expert systems have a variety of potential applications in process control. The application domain ranges from the entire plant system to a single loop system. Both, off-line and real-time problems may be realized. In this paper, expert system is employed as a part of a single control loop of PID Controller with self-tuning. The goal of expert system in the present study is to build up the necessary process knowledge required for efficient control. In order to achieve this process, the development of an expert system and a prototype model is carried out. OPS5, a rule based production system, is utilized in experiment, and common LISP is used for man-machine interface.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.67 no.8
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• pp.1047-1054
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• 2018

This paper proposed the strategies for controlling both the heater temperature and the output voltage of a single-phase inverter for the heat treatment. The single-phase inverter system for the heat treatment controls the heater temperature to its reference one, and also it limits the inverter output voltage to 60 V for safety. The stability may be deteriorated due to the large time constant difference between the heater temperature and inverter output voltage. In order to ensure the stability, a hysteresis on/off control approach for the heater temperature control is adapted, and both the open-loop and the closed-loop control strategies of the output voltage are suggested. The performances for the proposed strategies are demonstrated with the experiments.

• Aerospace Engineering and Technology
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• v.3 no.1
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• pp.170-178
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• 2004

This paper deals with six degree-of-freedom HILS(hardware-in-the-loop-simulation) of KSR-III rocket using a TAFMS(three axis flight motion simulator). This TAFMS HILS test is accomplished before main HILS tests in order to verify the control stability in the presence of TAFMS dynamic effects. The TAFMS HILS test includes initial attitude holding tests for INS initial alignment procedures, timer synchronization tests with an auxiliary lift-off signal, real-time calibration tests using an external thermal recorder, open-loop TAFMS operating tests, and final closed-loop TAFMS HILS tests using the TAFMS attitude measurements as inputs to the closed control loop. The HILS tests are accomplished for several flight conditions composed with nominal flight condition, TWD effect added condition, slosh modes and/or bending modes existing condition, and windy condition, etc.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.21 no.12
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• pp.16-22
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• 2020

The characteristics of the LCL filter for grid-connected inverters have been discussed in academia and industry. An online simulation tool was applied to compare and analyze the difference between the LCL filter and L filter. LCL filters were modeled and simulated using a range of professional simulation simulators, and the LCL filters were found to have good filtering effects for high-frequency harmonics. First, this paper summarizes the transfer functions of the LCL filter and provides the Bode plot diagram. The accuracy and validity of the filter attenuation characteristics were confirmed by a fast Fourier transform based on off-line simulation tools, such as PSIM and MATLAB, depending on the given parameters of the LCL filter. Finally, the Typhoon HIL402 real-time simulation was performed for hardware in the loop simulation to verify the actual filtering characteristics of the LCL filter.

• Transactions of the Korean Society of Automotive Engineers
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• v.22 no.2
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• pp.182-189
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• 2014

This paper proposes a decoupler design method to reduce interaction between exhaust gas recirculation (EGR) and variable geometry turbocharger (VGT) systems in passenger car diesel engines. The EGR valve and VGT vane are respectively used to control air-to-fuel ratio (AFR) of exhaust gas and intake pressure. A plant model for EGR and VGT systems is defined by a first order transfer function plus time-delay model, and the loop interaction between these systems is analyzed using a relative normalized gain array (RNGA) method. In order to deal with the loop interaction, a design method for simplified decoupler is applied to this study. Feedback control algorithms for AFR and intake pressure are composed of a compensator using PID control method and a prefilter. The proposed decoupler is evaluated through engine experiment, and the results successfully showed that the loop interaction between EGR and VGT systems can be reduced by using the proposed decoupler. Furthermore, it presents stable performance even off from the designed operating point.