• International Journal of Highway Engineering
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• v.10 no.2
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• pp.221-227
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• 2008

This study identifies the relationship between traffic data quality obtained from loop detectors and their location. Traffic data basically shows traffic flow conditions and thus, these information can be used as inputs for various transportation management strategies. Out study presents how to determine optimal downstream detector location on merging area in order to enhance the effects of ramp metering strategies. Microscopic simulation model, PARAMICS, is used as the main analytical tool. Assuming that detector location relies heavily on traffic flow characteristics in each roadway segment, we perform statistical analysis to identify homogeneous traffic conditions on merging area.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.9
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• pp.2176-2182
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• 2014

In this paper, a phase locked loop with suppressed power supply noise has been proposed. The added negative feedback loop of voltage controlled oscillator(VCO) and power noise detector suppresses the power noise induced jitter variation of VCO down to 1/3. The power noise detector is the modified circuit of frequency voltage converter. The proposed PLL has been designed based on a 1.8V 0.18um CMOS process and proved by HSPICE simulation.

• Journal of KIISE:Software and Applications
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• v.33 no.5
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• pp.489-498
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• 2006

In this paper, we suggested a vehicle classification algorithm using pattern recognition method. At present, Inductive Loop Detector is rarely used for vehicle classification because of its low accuracy. To improve the accuracy, we suggest a new algorithm for Loop Detector using neural networks. In the developed algorithm, the inputs to the neural networks are the variation rate of frequency and occupancy-time. The output is classified vehicles. The developed algorithm was assessed at test sites and the recognition rate was 91.3percent. The results verified that the proposed algorithm improves the vehicle classification accuracy compared to the conventional method based on Loop Detector.

• ETRI Journal
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• v.34 no.2
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• pp.175-183
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• 2012

Conventional synchronization algorithms for impulse radio require high-speed sampling and a precise local clock. Here, a phase-locked loop (PLL) scheme is introduced to acquire and track periodical impulses. The proposed impulse PLL (iPLL) is analyzed under an ideal Gaussian noise channel and multipath environment. The timing synchronization can be recovered directly from the locked frequency and phase. To make full use of the high harmonics of the received impulses efficiently in synchronization, the switching phase detector is applied in iPLL. It is capable of obtaining higher loop gain without a rise in timing errors. In different environments, simulations verify our analysis and show about one-tenth of the root mean square errors of conventional impulse synchronizations. The developed iPLL prototype applied in a high-speed ultra-wideband transceiver shows its feasibility, low complexity, and high precision.

• Journal of information and communication convergence engineering
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• v.9 no.3
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• pp.305-309
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• 2011

This paper proposes a new rotational frequency detector (RFD) for phase-locked loop (PLL) or clock and data recovery (CDR) applications for fast frequency acquisition. The proposed RFD uses the four states finite state machine (FSM) model to accelerate the frequency acquisition time. It is modeled and simulated with MATLAB Simulink. The functionalities of the proposed RFD are examined and the results are compared to those of a conventional RFD. The proposed RFD's frequency acquisition time is four times faster than that of a conventional one. The proposed RFD incorporated with a phase detector (PD) in PLL or CDR is expected to improve the frequency and phase acquisition performance later greatly.

• KIPS Transactions on Software and Data Engineering
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• v.4 no.5
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• pp.225-230
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• 2015

In this paper, we propose an effective real-time visual loop closure detector, VILODE, which makes use of key frames and bag of visual words (BoW) based on SURF feature points. In order to determine whether the camera has re-visited one of the previously visited places, a loop closure detector has to compare an incoming new image with all previous images collected at every visited place. As the camera passes through new places or locations, the amount of images to be compared continues growing. For this reason, it is difficult for a visual loop closure detector to meet both real-time constraint and high detection accuracy. To address the problem, the proposed system adopts an effective key frame selection strategy which selects and compares only distinct meaningful ones from continuously incoming images during navigation, and so it can reduce greatly image comparisons for loop detection. Moreover, in order to improve detection accuracy and efficiency, the system represents each key frame image as a bag of visual words, and maintains indexes for them using DBoW database system. The experiments with TUM benchmark datasets demonstrates high performance of the proposed visual loop closure detector.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2001.12a
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• pp.99-102
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• 2001

It has well known that the congestion of traffic and it's distribution. There are very important problems in the traffic control systems. In this paper, we will purpose an ITFS(Intelligent Traffic Forecasting System) which can determine the car classes and transport them to ITS(Intelligent Traffic control System). The system will be used the Inductive Loop Detector(ILD)and the Fuzzy logic and shown the effectiveness by the computer simulation.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.1771-1774
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• 2005

Recently, RFID has become popular in the field of remote sensing applications. Location awareness is one of the most important keys to deploying RFID for advanced object tracking. Generally, multiple reference RF stations or additional sensors are used for the location sensing with RFID, but, particularly in indoor environments, spatial layout and cost problems limit the applicability of those approaches. In this paper, we propose a novel method for location sensing with active RFID systems not requiring the need for reference stations or additional sensors. The system triangulates the position of RF signal source using the signal pattern of the loop antenna connected to the power detector. The power detector consists of a signal strength detector and a signal analysis unit. The signal analysis unit indicates the signal strength and serial number using the signal from the strength detector, and provides the direction of the signal to the application target. We designed three different signal analysis units depending on the threshold type. The developed system can sense the direction to the transponder located over 10 m away within the maximum error of $5^{\circ}$. It falls within a reasonable range in our normal office environment.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.12
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• pp.3286-3292
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• 1996

An experimental results of optical requency locked loop with DFB semiconductor laser as VCO are presented. Using quadricorrelator as frequency difference detector and frequency off-set locking technique with 1GHz reference frequency, frequency locking range of 140MHz was achieved. This paper reports the design and realization details of the loop.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.10
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• pp.76-81
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• 2013

A new phase frequency detector based digital phase-locked loop (PLL) of 125 MHz was designed using the 130 nm CMOS technology library consisting of inverting edge detectors along with a typical digital phase-locked loop to reduce the lock time and jitter for mid-frequency applications. XOR based inverting edge detectors were used to obtain a transition earlier than the reference signal to change the output more quickly. The HSPICE simulator was used in a Cadence environment for simulation. The performance of the digital phase-locked loops with the proposed phase frequency detector was compared with that of conventional phase frequency detector. The PLL with the proposed detector took $0.304{\mu}s$ to lock with a maximum jitter of approximately 0.1142 ns, whereas the conventional PLL took a minimum of $2.144{\mu}s$ to lock with a maximum jitter of approximately 0.1245 ns.