1 |
D.G. Messerschmitt, "Frequency Detectors for PLL Acquisition in Timing and Carrier Recovery," IEEE Transactions on Communications, vol. com-27, no. 9, pp. 809-820, Sep. 1979.
|
2 |
L. DeVito, J. Newton, R. Croughwell, J. Bulzacchelli, and F. Benkley, "A 52MHz and 155MHz Clock-Recovery PLL," ISSCC Dig. Tech. Papers, pp. 142-143, Feb. 1991.
|
3 |
T.H. Lee, and J.F. Bulzacchelli, "A 155-MHz Clock Recovery Delay- and Phase-Locked Loop," IEEE Journal of Solid-State Circuits, vol. 27, no.12 pp. 1736-1746, Dec. 1992.
DOI
ScienceOn
|
4 |
B. Razavi, Design of Integrated Circuits for Optical Communications, McGraw-Hill, 2003.
|
5 |
D. Dalton, K. Chai, E. Evans, M. Ferriss, D. Hitchcox, P. Murray, S. Selvanayagam, P. Shepherd, and L. DeVito, "A 12.5-Mb/s to 2.7-Gb/s Continuous-Rate CDR With Automatic Frequency Acquisition and Data-Rate Readback," IEEE Journal of Solid-State Circuits, vol. 40, no.12 pp. 2713-2725, Dec. 2005.
DOI
ScienceOn
|