• Journal of Power Electronics
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• 제11권4호
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• pp.456-463
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• 2011

Grid-connected converters have widely adopted LCL filters to acquire high harmonic suppression. However, the LCL filter increases the system order so that the design of the system stability would be complicated. Recently, sole-loop control strategies have been used for grid-connected converters with L or LC filters. But if the sole-loop control is directly transplanted to grid-connected converters with LCL filters, the systems may be unstable. This paper presents a novel dual-loop power control strategy composed of a power outer loop and a current inner loop. The outer loop regulates the grid-connected power. The inner loop improves the system stability margin and suppresses the resonant peak caused by the LCL filter. To obtain the control variables, a single-phase current detection is proposed based on PQ theory. The system transfer function is derived in detail and the influence of control gains on the system stability is analyzed with the root locus. Simulation and experimental results demonstrate the feasibility of the proposed control.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• 제14권6호
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• pp.479-486
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• 2021

In this paper, an ultra small phase locked loop (PLL) with a single capacitor loop filter has been proposed by adding a signal sensing circuit (SSC). In order to extremely reduce the size of the PLL, the passive element loop filter, which occupies the largest area, is designed with a very small single capacitor (2pF). The proposed PLL is designed to operate stably by the output of the internal negative feedback loop including the SSC acting as a negative feedback to the output of the single capacitor loop filter of the external negative feedback loop. The SSC that detects the PLL output signal change reduces the excess phase shift of the PLL output frequency by adjusting the capacitance charge of the loop filter. Although the proposed structure has a capacitor that is 1/78 smaller than that of the existing structure, the jitter size differs by about 10%. The PLL is designed using a 1.8V 180nm CMOS process and the Spice simulation results show that it works stably.

• Journal of the Korea Institute of Information and Communication Engineering
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• 제20권2호
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• pp.335-342
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• 2016

This paper proposes efficient hardware structure of in-loop filter for a high-performance HEVC (High Efficiency Video Coding) encoder. HEVC uses in-loop filter consisting of deblocking filter and SAO (Sample Adaptive Offset) to improve the picture quality in a reconstructed image due to a quantization error. However, in-loop filter causes an increase in complexity due to the additional encoder and decoder operations. A proposed in-loop filter is implemented as a three-stage pipeline to perform the deblocking filtering and SAO operation with a reduced number of cycles. The proposed deblocking filter is also implemented as a six-stage pipeline to improve efficiency and performs a new filtering order for efficient memory architecture. The proposed SAO processes six pixels parallelly at a time to reduce execution cycles. The proposed in-loop filter encoder architecture is designed by Verilog HDL, and implemented by 131K logic gates in TSMC $0.13{\mu}m$ process. At 164MHz, the proposed in-loop filter encoder can support 4K Ultra HD video encoding at 60fps in real time.

• Journal of the Korea Institute of Information and Communication Engineering
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• 제16권11호
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• pp.2495-2502
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• 2012

This paper presents a new structure of phase looked loop (PLL) for replacing a process sensitive resistor in loop filter with an additional charge pump (CP). The additional charge pump works as a resistor in a loop filter. The output of two charge pumps changes same direction according to process variation. The simulation results according to process conditions(SS/TT/FF) demonstrate that the proposed PLL works properly with process variations. It has been designed with a 1.8V $0.18{\mu}m$ CMOS process and proved by simulation with HSPICE.

• Journal of Institute of Control, Robotics and Systems
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• 제18권6호
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• pp.546-554
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• 2012

This paper suggests a design method of an improved phase control loop for tracking resonant frequency of solid type precision resonant gyroscope. In general, a low cost MEMS gyroscope adapts the automatic gain control loops by taking a velocity feedback configuration. This control technique for controlling the resonance amplitude shows a stable performance. But in terms of resonant frequency tracking, this technique shows an unreliable performance due to phase errors because the AGC method cannot provide an active phase control capability. For the resonance control loop design of a solid type precision resonant gyroscope, this paper presents a phase domain control loop based on linear PLL (Phase Locked Loop). In particular, phase control loop is exploited using a higher order PLL loop filter by extending the first order active PI (Proportion-Integral) filter. For the verification of the proposed loop design, a hemispherical resonant gyroscope is considered. Numerical simulation result demonstrates that the control loop shows a robust performance against initial resonant frequency gap between resonator and voltage control oscillator. Also it is verified that the designed loop achieves a stable oscillation even under the initial frequency gap condition of about 25 Hz, which amounts to about 1% of the natural frequency of a conventional resonant gyroscope.

• Journal of the Korean Society for Aviation and Aeronautics
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• 제23권2호
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• pp.63-68
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• 2015

This paper presents the algorithm for envelope protection of helicopters. The algorithm consists of two feedback control loops: inner loop and outer loop. As an inner loop control, model following control is designed to meet the ADS-33 handling qualities specification by minimizing the tracking errors between the responses of the actual model and those of the command filter. In order to implement envelope protection, saturation limiter is imposed to command channels in command filter, whose limits are computed corresponding to the envelope limit. Fast model predictive control is designed as an outer loop control to deal with saturation constraints generated by the inner loop envelope protection and also imposed by outer loop envelope protection variables. Simulation results show that the proposed algorithm yields good envelope protection performance.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 한국전기전자재료학회 1999년도 추계학술대회 논문집
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• pp.315-318
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• 1999

The purpose of this study is to establish the design theory of a DR ceramic bandpass filter used for WLL basestations and to research on the design theory of bandpass filter. The design procedure is circuit parameters and structural parameters will be derived. It was observed that the filter characteristics at the simulations

• International Journal of Aeronautical and Space Sciences
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• 제18권1호
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• pp.118-128
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• 2017

In this study, we propose a real time inertial navigation system/global positioning system (INS/GPS) integrated smoothing algorithm based on an extended Kalman filter (EKF) and a position damping loop (PDL) for synthetic aperture radar (SAR). Integrated navigation algorithms usually induce discontinuities due to error correction update by the Kalman filter, which are as detrimental to the performance of SAR as the relative position error. The proposed smoothing algorithm suppresses these discontinuities and also reduces the relative position error in real time. An EKF estimates the navigation errors and sensor biases, and all the errors except for the position error are corrected directly and instantly. A PDL activated during SAR operation period imposes damping effects on the position error estimates, where the estimated position error is corrected smoothly and gradually, which contributes to the real time smoothing and small relative position errors. The residual errors are re-estimated by the EKF to maintain the estimation performance and the stability of the overall loop. The performance improvements were confirmed by Monte Carlo simulations. The simulation results showed that the discontinuities were reduced by 99.8% and the relative position error by 48% compared with a conventional EKF without a smoothing loop, thereby satisfying the basic performance requirements for SAR operation. The proposed algorithm may be applicable to low cost SAR systems which use a conventional INS/GPS without changing their hardware configurations.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 한국정밀공학회 2005년도 추계학술대회 논문집
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• pp.744-747
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• 2005

This research studied 6-Axes Articulated Robot Manipulator's gain Tuning in consideration of dynamic. First of all, search fur proportional gain of velocity control loop by dynamic signal analyzer. Proportional gain of velocity control loop is connected to dynamic signal analyzer. Next Select free Proportional Gain value. And Select amplitude X of sinusoidal properly so that enough Velocity Feedback Signal may be paid as there is no group to utensil department. Next step, We can get Bode Diagram of Closed loop transfer function response examination in interested frequency. Integral calculus for gain of velocity loop is depended on integral calculus correction's number. We can obtain open loop transfer function by integrator. And we can know bode diagram's special quality from calculated open loop transfer function. With this, Velocity Control Loop's Parameter as inner loop is controlled. Next In moving, when vibration occurs, it controls notch filter. And finally, we have to control fred-forward filter parameter for elevation of control performance.

• International Journal of Control, Automation, and Systems
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• 제5권2호
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• pp.161-169
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• 2007

The PLL equivalent augmented system incorporated with state feedback is proposed in this paper. The optimal value of filter time constant of loop filter in the phase-locked loop control system and the optimal state feedback gain designed by using linear quadratic regulator approach are derived. This approach allows the PLL control system to employ the large value of the phase-frequency gain $K_d$ and voltage control oscillator gain $K_o$. In designing, the structure of phase-locked loop control system will be rearranged to be a phase-locked loop equivalent augmented system by including the structure of loop filter into the process and by considering the voltage control oscillator as an additional integrator. The designed controller consisting of state feedback gain matrix K and integral gain $k_1$ is an optimal controller. The integral gain $k_1$ related to weighting matrices q and R will be an optimal value for assigning the filter time constant of loop filter. The experimental results in controlling the second-order lag pressure process using two types of loop filters show that the system response is fast without steady-state error, the output disturbance effect rejection is fast and the tracking to step changes is good.