• Title/Summary/Keyword: Logical Architecture

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A Study on the Application of SE Approach to the Design of Health Monitoring Pilot Platform utilizing Big Data in the Nuclear Power Plant (NPP) (원전 상태 감시 및 조기 경보용 빅데이터 시범 플랫폼의 설계를 위한 시스템 엔지니어링 방법론 적용 연구)

  • Cha, Jae-Min;Shin, Junguk;Son, Choong-Yeon;Hwang, Dong-Sik;Yeom, Choong Sub
    • Journal of the Korean Society of Systems Engineering
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    • v.11 no.2
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    • pp.13-29
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    • 2015
  • With the era of big data, the big data has been expected to have a large impact in the NPP safety areas. Although high interests of the big data for the NPP safety, only a limited researches concerning this issue are revealed. Especially, researches on the logical/physical structure and systematic design methods for the big data platform for the NPP safety were not dealt with. In this research, we design a new big data pilot platform for the NPP safety especially focusing on health monitoring and early warning services. For this, we propose a tailored design process based on SE approaches to manage inherent high complexities of the platform design. The proposed design process is consist of several steps from elicitate stakeholders to integration test via define operational concept and scenarios, and system requirements, design a conceptual functional architecture, select alternative physical modules for the derived functions and assess the applicability of the alternative modules, design a conceptual physical architecture, implement and integrate the physical modules. From the design process, this paper covers until the conceptual physical architecture design. In the following paper, the rest of the design process and results of the field test will be shown.

SIA-LVC : Scalable Interworking Architecture for Military L-V-C Training Systems Based on Data Centric Middleware (SIA-LVC: 데이터 중심 미들웨어 기반 확장성 있는 국방 L-V-C 훈련체계 연동 아키텍쳐)

  • Kim, Won-Tae;Park, Seung-Min
    • KIPS Transactions on Computer and Communication Systems
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    • v.5 no.11
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    • pp.393-402
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    • 2016
  • A Military L-V-C system consists of distributed complex systems integrating Live systems working on physical wall-clock time, Virtual systems ruled by virtually pseudo realtime events on a computer, and Constructive systems only depending on the causal relationship between the continuous events. Recently many needs for L-V-C training systems are increasing in order to achieve the maximum training effects with low costs. While theoretical/logical researches or only partially interworking technologies have been proposed, there are few perfect interworking architectures for totally interoperating L-V-C systems in world-wide. In this paper, we design and develop a novel interworking architecture based on data centric middleware for the consistent global time with the same states on the entire L-V-C data and events by means of integrating the heterogeneous distributed middleware standards of each L-V-C system. In addition, simulated L-V-C systems based on real systems will be used for the efficiency and performance of the developed interworking architecture.

A Cost-Effective WDM-PON Architecture for Dynamic Resource Provision (자원의 동적 능력 향상을 위한 경제적인 WDM-PON 구조)

  • Kim, Hyo-Won;Hwang, Jun-Ho;Yoo, Myung-Sik
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.7B
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    • pp.422-430
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    • 2007
  • WDM-PON has been receiving much attention as a key technology to FTTH. As the cost of WDM-PON heavily depends on the number of transceivers implemented at ONU, one of its shortcomings comes from the fixed provision of wavelength resource, which is tightly coupled with costly transceivers. In this paper, we propose a cost-effective WDM-PON architecture for dynamic resource provision. The proposed architecture is based on hierarchical grouping of multiple ONUs into a logical group and hierarchical sharing the resource. For high utilization of dynamic resource, the dynamic resource allocation algorithm is also proposed. We analyze the system efficiency in term of dynamism of system resource and system cost. We also verify that the proposed resource allocation algorithm achieves a high dynamism on resource allocation, and at the same time maintains the fairness between ONUs.

A Study of Administration of Cyber Range (사이버 레인지 운용 방안 연구)

  • Kim, Daesik;Kim, Yonghyun
    • Journal of Internet Computing and Services
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    • v.18 no.5
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    • pp.9-15
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    • 2017
  • In the whole world the Attack Technologies of cyber warfare in modern society are growing faster and complicated. The frequency of the new attacks is shorter than before day by day. The defense technologies and experts against these attacks are very few. One of answers to solve these problems is the cyber range as a test-bed to prepare the cyber warfare considered by many countries. This paper examines the foreign cases and similar systems, collects and analyzes various attributes for cyber range. Finally it refines them through system engineering processes. In these processes missions and concepts for administration are set with architecture framework. The logical architecture is designed. Based on designed architecture two goals, defense technologies and procurement of experts, are established. And it shows effective and persistent administration of cyber range.

Design and Application of Data Interchange Formats (DIFs) for Improving Interoperability in SBA (SBA 상호운용성 향상을 위한 데이터교환서식 설계 및 활용에 관한 연구)

  • Kim, Hwang Ho;Kim, Moon Kyung;Choi, Jin Young;Wang, Gi-Nam
    • Journal of Information Technology and Architecture
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    • v.9 no.3
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    • pp.275-285
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    • 2012
  • DIFs (Data Interchange Formats) are needed to enhance interoperability of physically distributed organizations in SBA (Simulation Based Acquisition) process. DIFs play a role as a template of DPDs (Distributed Product Descriptions) and provide capability to use information directly without data format interchange process by allowing access to DPDs, which include various information and M&S (Modeling & Simulation) resources. This characteristic is essential for interoperability in ICE (Integrated Collaborative Environment) based SBA. This paper proposes a framework for the DIF and outputs from each phase of acquisition process for configuration data related to design and manufacturing in SBA process - Conceptual Data Model, Logical Data Model, Physical Data Model and Physical DIF based on XML. Finally, we propose the DIF model architecture and demonstrate the implementation of DIF example based on it.

A Conceptual Model for Location Based Public Transit Transfer Information Service (사용자 위치기반 환승정보서비스 개념모델)

  • Lim, Jung-Sil;Moon, Young-Jun;Oh, Young-Tae;Lee, Choul-Ki;Bae, Myoung-Hwan
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.7 no.4
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    • pp.1-12
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    • 2008
  • The issues of developing the value added services for public transport connectivity and transfer with information and communication technologies has been discussed in terms of incorporating system facilities with public transit modes to increase the ridership of public transit. This paper demonstrates a conceptual model for providing the location based public transit transfer information service on demand with respect to system requirements, subsystems, and logical architecture based on the national ITS architecture. The subsystems in this study which include transfer information center, parking concierge, user route guidance and information provision system are also investigated in detail in order for information service and/or contents provider to develop business models on public transit connectivity and transfer. This model is expected to be utilized in providing the variety of service models with the different types of public transit connectivity and transfer systems according to the system scale and the public transit modes.

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Realtime Media Streaming Technique Based on Adaptive Weight in Hybrid CDN/P2P Architecture

  • Lee, Jun Pyo
    • Journal of the Korea Society of Computer and Information
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    • v.26 no.3
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    • pp.1-7
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    • 2021
  • In this paper, optimized media data retrieval and transmission based on the Hybrid CDN/P2P architecture and selective storage through user's prediction of requestability enable seamless data transfer to users and reduction of unnecessary traffic. We also propose a new media management method to minimize the possibility of transmission delay and packet loss so that media can be utilized in real time. To this end, we construct each media into logical segments, continuously compute weights for each segment, and determine whether to store segment data based on the calculated weights. We also designate scattered computing nodes on the network as local groups by distance and ensure that storage space is efficiently shared and utilized within those groups. Experiments conducted to verify the efficiency of the proposed technique have shown that the proposed method yields a relatively good performance evaluation compared to the existing methods, which can enable both initial latency reduction and seamless transmission.

Hardware Abstraction Architecture for Low Cost Flash Memories in Wireless Sensor Nodes (무선 센서 노드상의 저가형 플래시 메모리를 위한 하드웨어 추상화 구조)

  • Kim, Chang-Hoon;Kwon, Young-Jik
    • Journal of Korea Society of Industrial Information Systems
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    • v.14 no.2
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    • pp.72-80
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    • 2009
  • In this parer, we propose a hardware abstraction architecture(HAA) for low cost flash memories that can be applicable to wireless sensor nodes. The proposed HAA consists of three layers. The three layers are 1) HHL(Hardware Interlace Layer), HAL(Hardware Adaption Layer), and HPL(Hardware Presentation Layer), where HIL provides a platform independent interlace to applications of upper layers, HAL performs hardware resource management, program status control, and generation of logical instructions as main core of the HAA, and HPL initializes hardware and communicates data between MCU and flash memory. We implemented our HAA on AT45DB flash memory, and the HAA used 4,384 bytes program memory and 195 bytes data memory respectively. Since the proposed HAA is composed of well defined three layers and shows a low utilization of memory, it can provides a high efficiency in terms of flexibility, scalability, and re-usability, and thus the HAA is well suited for wireless sensor nodes.

A Study of symbols based on characteristics of kind of garden space -Focusing on the target area of the artist's garden exhibited at the Seoul Garden Fair in 2017- (정원 공간 유형의 특성에 근거한 기호화 연구 -2017년 서울 정원박람회에 출품된 작가정원의 대상지를 중심으로-)

  • Kim, Da Kyung;Jun, Hyung Soon;Yoo, Taek Sang;Wang, Kyung Hee
    • Journal of the Korean Society of Floral Art and Design
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    • no.40
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    • pp.97-123
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    • 2019
  • The purpose of this study is to analyze the spatial characteristics of the unit of garden and to classify and symbolize it, to provide the basis for analyzing the works based on the characteristics of the space and to provide the data that can become the logical foundation for garden design. The research method first analyzed the behavioral scene analysis and the grounded theory methodology as the theory about the space type. It controls the subjectivity of the researcher and derives the characteristics of the space for the garden image based on the experiential knowledge of the expert, It is a qualitative analysis method that aims to increase credibility. The actual case target was the author garden which was exhibited at the 2017 Seoul Garden Expo. Through this process, we have simplified the characteristics of the space and the positives and negatives accordingly. We have grasped the relationship between spatial space, sculptural space, architectural space, and environmental space.. Research on qualitative topics such as the characteristics of space can not completely exclude the subjectivity of the researcher in terms of its characteristics, but such research can provide a rationale for interpreting and evaluating the gardens that depend on the individual's taste.. It can also contribute to the development of the field by providing reference materials for garden designs that rely on designer intuition, or by providing a logical basis for design.

A Design of Low Power 16-bit ALU by Switched Capacitance Reduction (Switched Capacitance 감소를 통한 저전력 16비트 ALU 설계)

  • Ryu, Beom-Seon;Lee, Jung-Sok;Lee, Kie-Young;Cho, Tae-Won
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.1
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    • pp.75-82
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    • 2000
  • In this paper, a new low power 16-bit ALU has been designed, fabricated and tested at the transistor level. The designed ALU performs 16 instructions and has a two-stage pipelined architecture. For the reduction of switched capacitance, the ELM adder of the proposed ALU is inactive while the logical operation is performed and P(propagation) block has a dual bus architecture. A new efficient P and G(generation) blocks are also proposed for the above ALU architecture. ELM adder, double-edge triggered register and the combination of logic style are used for low power consumption as well. As a result of simulations, the proposed architecture shows better power efficient than conventional architecture$^{[1,2]}$ as the number of logic operation to be performed is increased over that of arithmetic to logic operation to be performed is 7 to 3, compared to conventional architecture. The proposed ALU was fabricated with 0.6${\mu}m$ single-poly triple-metal CMOS process. As a result of chip test, the maximum operating frequency is 53MHz and power consumption is 33mW at 50MHz, 3.3V.

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