• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.37 no.3
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• pp.275-282
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• 2009

Generally, the sinusoidal cavity dither is adopted to ring laser gyroscope for eliminating the lock-in which is non-linear effect at the small rotation input. Despite this method, there are some remained errors which are generated at the dither turnaround, and those errors produce random walk which is a general character of a ring laser gyroscope. As one of the numerous research results for compensating these errors, there is a special lock-in compensation method which is the method of error estimation and compensation by comparing the beat signal periods of before and after the dither turnarounds. In this paper, by ring laser gyroscope modeling and numerical analysis, we verified the theoretical validity and confirmed the effectiveness of this method in expectation of the possible beat signal measurement time resolution. As a result, we confirmed the random walk decreases from a-half to a-third by this lock-in compensation method. So, it is expected to be a remarkable method for reducing the INS alignment time.

• Journal of the Korea Institute of Military Science and Technology
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• v.2 no.1
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• pp.139-149
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• 1999

In this paper, we estimate the scale factor error and random walk characteristics of the ring laser gyro which has the body dither for Lock-in compensation. And then, we compared those results with the static test results for 28cm square ring laser gyro which has about 0.5 deg/sec static Lock-in. In the case of sinusoidal body dither, dynamic Lock-in occurs periodically at the points where the gyro output pulse becomes the integer multiples of body dither frequency. The width of dynamic Lock-in is changed by variation of dither amplitude, and, between the width of dynamic Lock-in which occurs at the even multiple points of body dither frequency and that at the odd muliple points of body dither frequency, it has 180o phase difference. Generally random body dither is adopted to compensate for dynamic Lock-in. Then if the irregularity is not large enough, the scale factor error by dynamic Lock-in is not vanished. And if the irregularity is large enough, the scale factor error decreases, but random walk becomes larger relatively. And we confirmed that the larger body dither amplitude, the smaller random walk.

• Proceedings of the KIPE Conference
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• 2018.11a
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• pp.95-97
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• 2018

The power quality of Single Phase Grid-Connected Inverters (GCIs) has received much attention with the increasing number of Distributed Generation (DG) systems. However, the performance of single phase GCIs get degraded due to several factors such as the grid voltage harmonics, the dead time effect, and the turn ON/OFF of the switches, which causes the harmonics at the output of GCIs. Therefore, it is not easy to satisfy the harmonic standards such as IEEE 519 and P1547 without the help of harmonic compensator. To meet the harmonic standards a certain kind of harmonic controller needs to be added to the current control loop to effectively mitigate the low order harmonics. In this paper, the harmonic compensation is performed using a novel robust harmonic compensation method based on Digital Lock-in Amplifier (DLA). In the proposed technique, DLAs are used to extract the amplitude and phase information of the harmonics from the output current and compensate it by using a simple PI controller in the feedforward manner. In order to show the superior performance of the proposed harmonic compensation technique, it is compared with those of conventional harmonic compensation methods in terms of the effectiveness of harmonic elimination, complexity, and implementation. The validity of the proposed harmonic compensation techniques for the single phase GCIs is verified through the experimental results with a 5kW single phase GCI. Index Terms -Single Phase Grid Connected Inverter (SPGCI), Harmonic Compensation Method, Total Harmonic Distortion (THD) and Harmonic Standard.

• Korean Journal of Optics and Photonics
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• v.34 no.2
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• pp.76-83
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• 2023

In this paper, the results of analyzing the frequency lock-in breaking characteristics of a ring laser gyroscope with random dithering through numerical experiments are presented. By observing the variant features in the frequency lock-in characteristics according to the dithering amplitude noise, it was possible to analyze the minimum noise condition that causes the frequency lock-in to be broken. It was confirmed that the result is closely related to the relative difference between the dynamic frequency lock-in corresponding to the average dithering amplitude and the frequency determined by the Sagnac effect corresponding to an input rotational angular velocity.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.12
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• pp.1000-1003
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• 2012

The superconducting fault current limiter (SFCL) can quickly limit the fault current shortly after the short circuit occurs and recover the superconducting state after the fault removes and plays a role in compensating the voltage sag of the sound feeder adjacent to the fault feeder as well as the fault current limiting operation of the fault feeder. Especially, the flux-lock type SFCL with an isolated transformer, which consists of two parallel connected coils on an iron core and the isolated transformer connected in series with one of two coils, has different voltage sag compensating and current limiting characteristics due to the winding direction and the inductance ratio of two coils. The current limiting and the voltage sag compensating characteristics of a SFCL using a transformer winding were analyzed. Through the analysis on the short-circuit tests results considering the winding direction of two coils, the SFCL designed with the additive polarity winding has shown the higher limited fault current than the SFCL designed with the subtractive polarity winding. It could be confirmed that the higher fault current limitation of the SFCL could be contributed to the higher load voltage sag compensation.

• The Transactions of the Korean Institute of Power Electronics
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• v.25 no.5
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• pp.358-368
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• 2020

Grid-connected inverters (GCIs) based on renewable energy sources play an important role in enhancing the sustainability of a society. Harmonic standards, such as IEEE 519 and P1547, which require the total harmonic distortion (THD) of the output current to be less than 5%, should be satisfied when GCIs are connected to a grid. However, achieving a current THD of less than 5% is difficult for GCIs with an output filter under a distorted grid condition. In this study, a novel harmonic compensation method that uses a digital lock-in amplifier (DLA) is proposed to eliminate harmonics effectively at the output of GCIs. Accurate information regarding harmonics can be obtained due to the outstanding performance of DLA, and such information is used to eliminate harmonics with a simple proportional-integral controller in a feedforward manner. The validity of the proposed method is verified through experiments with a 5 kW single-phase GCI connected to a real grid.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.11A
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• pp.882-890
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• 2009

In this paper, we describe a compensation method that can be used for the situation where Loran receivers lose their phase lock to the received Loran signals when Loran signals are employed for the synchronization of national infrastructures such as telecommunication networks, electric power distribution and so on. In losing the phase lock to the received signals in a Loran receiver, the inner oscillator of the receiver starts free-running and the performance of the timing synchronization signals which are locked to the oscillator's phase is very severly degraded, so the timing accuracy under 1 us for a Primary Reference Clock (PRC) required in the International Telecommunications Union (ITU) G.811 standard can not be satisfied in the situation. Therefore, in this paper, we propose a method which can compensate the phase jump by using a compensation algorithm when a Loran receiver loses its phase lock and the performance evaluation of the proposed algorithm is achieved by the Maximum Time Interval Error (MTIE) of the measured data. From the performance evaluation results, it is observed that the requirement under 1 us for a PRC can be easily achieved by using the proposed algorithm showing about 0.6 us with under 30 minutes mean interval of smoothing with 1 hour period when the loss of phase lock occurs.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.2
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• pp.134-139
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• 2013

When the accident occurred in power distribution system, it needs to control efficiently the fault current according to the fault angle and location. The flux-lock type superconducting fault current limiters (SFCL) can quickly limit when the short circuit accidents occurred and be made the resistance after the fault current. The flux-lock type SFCL has a single triggering element, detects and limits the fault current at the same time regardless of the size of the fault current. However, it has a disadvantage that broken the superconductor element. If the flux-lock type SFCL has separated structure of the triggering element and the limiting element, when large fault current occurs, it can reduce the burden of power and control fault current to adjust impedance. In this paper, this system is composed by triggering element and limiting element to analyze operation of limiting current. When the fault current occurs, we analyzed the limiting and operating current characteristics of the two triggering current level, and the compensation characteristics of bus-voltage sag according to the fault angle and location.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.47 no.5
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• pp.358-363
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• 2019

If the EOIR equipment mounted on an unmanned aircraft transmits images and receives commands through a data link, there may be delays in data transmission depending on the transmission path of the data and the conditions of the ground equipment or wireless network. This increases the possibility of initial target LOCK-ON failure due to the difference between the time when the received image is viewed and the time when the image is taken. Therefore, this paper proposed a way to use frame indexes to synchronize with images, and to increase the success of target tracking by adding frame indexes to commands from the ground station.

• Proceedings of the KIPE Conference
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• 2019.07a
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• pp.71-73
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• 2019

The output current of the Grid Connected Inverter (GCI) can be polluted with harmonics mainly due to i) dead time in switches, ii) non-linearity of switches, iii) grid harmonics, and iv) DC link fluctuation. Therefore, it is essential to design the robust Harmonic Compensation (HC) technique for the improvement of output current quality and fulfill the IEEE 1547 Total harmonics Distortion (THD) limit i.e. <5%. The conventional harmonic techniques often are complex in implementation due to their i) additional hardware needs, ii) complex structure, iii) difficulty in tuning of parameters, iv) current controller compatibility issues, and v) higher computational burden. In this paper, to eliminate the harmonics from the GCI output current, a novel Digital Lock-In Amplifier (DLA) based harmonic detection is proposed. The advantage of DLA is that it extracts the harmonic information accurately, which is further compensated by means of PI controller in feed forward manner. Moreover, the proposed HC method does not require additional hardware and it works with any current controller reference frame. To show the effectiveness of the proposed HC method a 5kW GCI prototype built in laboratory. The output current THD is achieved less than 5% even with 10% load, which is verified by simulation and experiment.