• Title/Summary/Keyword: Lock-Free

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HD-Tree: High performance Lock-Free Nearest Neighbor Search KD-Tree (HD-Tree: 고성능 Lock-Free NNS KD-Tree)

  • Lee, Sang-gi;Jung, NaiHoon
    • Journal of Korea Game Society
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    • v.20 no.5
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    • pp.53-64
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    • 2020
  • Supporting NNS method in KD-Tree algorithm is essential in multidimensional data applications. In this paper, we propose HD-Tree, a high-performance Lock-Free KD-Tree that supports NNS in situations where reads and writes occurs concurrently. HD-Tree reduced the number of synchronization nodes used in NNS and requires less atomic operations during Lock-Free method execution. Comparing with existing algorithms, in a multi-core system with 8 core 16 thread, HD-Tree's performance has improved up to 95% on NNS and 15% on modifying in oversubscription situation.

Implementation of Lock-Free shared_ptr and weak_ptr for C++11 multi-thread programming (C++11 멀티스레드 프로그래밍을 위한 Lock-Free shared_ptr와 weak_ptr의 구현)

  • Ku, TaeKyun;Jung, NaiHoon
    • Journal of Korea Game Society
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    • v.21 no.1
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    • pp.55-66
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    • 2021
  • Multi-thread programming is essential in high performance game programming. But, the widely used C++11 shared_ptr and weak_ptr have malfunction and performance problems in multi-thread environments. In this paper, we propose Lock-Free shared_ptr and weak_ptr, which have higher performance than current error preventing methods. These use a non-blocking algorithm to prevent data race in multi-thread environments. As a result of experimenting in an 8 thread environment, performance has improved up to 7424% in a situation where competition between threads is low, and 3767% in high competition.

A 500 MHz-to-1.2 GHz Reset Free Delay Locked Loop for Memory Controller with Hysteresis Coarse Lock Detector

  • Chi, Han-Kyu;Hwang, Moon-Sang;Yoo, Byoung-Joo;Choe, Won-Jun;Kim, Tae-Ho;Moon, Yong-Sam;Jeong, Deog-Kyoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.11 no.2
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    • pp.73-79
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    • 2011
  • This paper describes a reset-free delay-locked loop (DLL) for a memory controller application, with the aid of a hysteresis coarse lock detector. The coarse lock loop in the proposed DLL adjusts the delay between input and output clock within the pull-in range of the main loop phase detector. In addition, it monitors the main loop's lock status by dividing the input clock and counting its multiphase edges. Moreover, by using hysteresis, it controls the coarse lock range, thus reduces jitter. The proposed DLL neither suffers from harmonic lock and stuck problems nor needs an external reset or start-up signal. In a 0.13-${\mu}m$ CMOS process, post-layout simulation demonstrates that, even with a switching supply noise, the peak-to-peak jitter is less than 30 ps over the operating range of 500-1200 MHz. It occupies 0.04 $mm^2$ and dissipates 16.6 mW at 1.2 GHz.

An Analog Multi-phase DLL for Harmonic Lock Free (Harmonic Locking을 제거하기 위한 아날로그 Multi- phase DLL 설계)

  • 문장원;곽계달
    • Proceedings of the IEEK Conference
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    • 2001.06b
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    • pp.281-284
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    • 2001
  • This paper describes an analog multi-phase delay-locked loop (DLL) to solve the harmonic lock problem using current-starved inverter and shunt-capacitor delay cell. The DLL can be used not only as an internal clock buffer of microprocessors and memory It's but also as a multi-phase clock generator for gigabit serial interfaces. The proposed circuit was simulated in a 0.25${\mu}{\textrm}{m}$ CMOS technology to solve harmonic lock problem and to realize fast lock-on time and low-jitter we verified time interval less than 40 ps as the simulation results.

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The Real-Time Constructive Simulation With the RM scheduling and Lock-free Shared Objects (RM 스케쥴링과 Lock-Free 공유개체에 의한 실시간 시뮬레이션)

  • 박현규
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.519-522
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    • 1998
  • The Constructive Battle simulation Model is very important to the recent military training for the substitution of the field training. However, real battlefield systems operate under rea-time conditions, they are inherently distributed, concurrent and dynamic. In order to reflect these properties by the computer-based simulation systems which represent real world processes, we have been developing constructive simulation model for several years. The constructive simulation system is one of the famous real-time system software, nd the one common feature of all real-time systems is defined as the correctness of the system depend not only on the logical result of computation, but also on the time at which the results are produced. Conventionally, scheduling and resource allocation activities which have timing constraints are major problem of real-time computing systems. To overcome these constraints, we elaborated on these issues and developed the simulation system on commercially available hardware and operating system with lock-free resource allocation scheme and rae monotonic scheduling.

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Design and Implementation of Efficient Memory Allocator using Contiguous Allocation Scheme (연속할당 기법을 이용한 효과적인 lock-free 메모리 할당자 설계 및 구현)

  • Kim, In-Hyuk;Kim, Tae-Hyoung;Eom, Young-Ik
    • Proceedings of the Korean Information Science Society Conference
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    • 2011.06a
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    • pp.559-561
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    • 2011
  • 멀티코어 환경에서는 공유 데이터에 대한 동기화로 인한 병목 현상이 중요한 문제점 중의 하나이다. 그리고 동적 메모리 할당자는 대량의 메모리를 할당 및 해제하는 프로그램에서 공유 데이터에 대한 동기화 문제로 성능 저하를 유발시키고 있다. 이를 해결하기 위해 다양한 lock-free 메모리 할당 기법들이 소개되었지만 false sharing과 heap blow-up과 같은 여러 가지 문제점들을 가지고 있다. 이에 본 논문에서는 새로운 연속할당 기법을 제안하고, 이를 이용하여 동일 블록 내의 오브젝트 할당/해제에 따른 동기화 문제를 해결함으로써 효과적인 lock-free 메모리 할당 기법을 제안하였다. 그리고 제안 기법을 구현하여 기존의 메모리 할당 기법들과 실험을 통하여 검증하였으며, 대량의 메모리를 사용하는 멀티 스레드 환경에서 특히 좋은 성능을 보이는 것을 확인하였다.

A Digital DLL with 4-Cycle Lock Time and 1/4 NAND-Delay Accuracy

  • Kim, Sung-Yong;Jin, Xuefan;Chun, Jung-Hoon;Kwon, Kee-Won
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.4
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    • pp.387-394
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    • 2016
  • This paper presents a fully digital delay locked loop (DLL) that can acquire lock in four clock cycles with a resolution of a 1/4 NAND-delay. The proposed DLL with a multi-dither-free phase detector acquires the initial lock in four clock cycles with 1/2 NAND-delay. Then, it utilizes a multi-dither-free phase detector, a region accumulator, and phase blenders, to improve the resolution to a 1/4 NAND-delay. The region accumulator which continuously steers the control registers and the phase blender, adaptively controls the tracking bandwidth depending on the amount of jitter, and effectively suppresses the dithering jitter. Fabricated in a 65 nm CMOS process, the proposed DLL occupies $0.0432mm^2$, and consumes 3.7 mW from a 1.2-V supply at 2 GHz.

Event-Driven Real-Time Simulation Based On The RM Scheduling and Lock-free Shared Objects

  • Park, Hyun Kyoo
    • Journal of the military operations research society of Korea
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    • v.25 no.1
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    • pp.199-214
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    • 1999
  • The Constructive Battle Simulation Model is very important to the recent military training for the substitution of the field training. However, real battlefield systems operate under real-time conditions, they are inherently distributed, concurrent and dynamic. In order to reflect these properties by the computer-based simulation systems which represent real world processes, we have been developing constructive simulation model for several years. Conventionally, scheduling and resource allocation activities which have timing constraints, we elaborated on these issues and developed the simulation system on commercially available hardware and operating system with lock-free resource allocation scheme and rate monotonic scheduling.

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Direct Numerical Simulation of the Lock-on Phenomena in the Wake behind a Circular Cylinder in a Perturbed Flow at Re=360 (Re=360에서 교란유동장에 놓인 원형실린더 후류의 유동공진 현상에 대한 직접수치해석)

  • Park, Ji-Yong;Kim, Soo-Hyeon;Bae, Joong-Hun;Park, No-Ma;Yoo, Jung-Yul
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.31 no.9
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    • pp.780-789
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    • 2007
  • Lock-on phenomenon in the wake of a circular cylinder is investigated at the Reynolds number of 360 using direct numerical simulation (DNS). To induce lock-on, a streamwise velocity perturbation with a frequency of twice the natural shedding frequency is superimposed on the free stream velocity. The Reynolds stress distributions are investigated to analyze the streamwise force balance acting on the recirculation region and the results are compared with the previous experimental result. When the lock-on occurs, the pressure force on the recirculation region is shown to increase mainly due to the reversal of the Reynolds shear stress distribution, which is consistent with our previous results using PIV measurement. It is also shown that, with the lock-on, the strength of the primary vortices increases whereas that of the secondary vortices decreases significantly. Further, under the lock-on condition the wavelength of the secondary vortices increases by as much as 2.5 times.

A Concurrency Control Method for Non-blocking Search Operation based on R-tree (논 블록킹 검색연산을 위한 R-tree 기반의 동시성 제어 기법)

  • Kim, Myung-Keun;Bae, Hae-Young
    • The KIPS Transactions:PartD
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    • v.11D no.4
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    • pp.809-822
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    • 2004
  • In this paper, we propose a concurrency control algorithm based on R-tree for spatial database management system. The previous proposed algorithms can't prevent problem that search operation is to be blocking during update operations. In case of multidimensional indexes like R-tree, locking of update operations may be locked to several nodes, and splitting of nodes have to lock a splitting node for a long time. Therefore search operations have to waiting a long time until update operations unlock. In this paper we propose new algorithms for lock-free search operation. First, we develop a new technique using a linked-list technique on the node. The linked-list enable lock-free search when search operations search a node. Next, we propose a new technique using a version technique. The version technique enable lock-free search on the node that update operations is to be splitting.