• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 2000년도 학술대회논문집
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• pp.225-230
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• 2000

This paper describes a double-ended current fed push-pull type high frequency resonant inverter used as the power supply for wax-sealing. The proposed inverter can realize ZVS operation by using resonant capacitor to ZVS capacitor and has some merits not only reduction of switch current distribution but also extension of load range compare to the conventional single-ended current fed push-pull type high frequency resonant inverter. This analysis of proposed circuit uses normalized parameter ad characteristic estimation which is needed in each step before design is generally described according to normalized frequency($\mu$), normalized resistance(λ) and parameters. It is also presented as an example of method of the circuit design based on estimation analysis values from theoretical analysis. The theoretical analysis is proved through experiment and this circuit shows that it can be used practically as the power supply system for wax-sealing and DC-DC converter.

• 산업기술연구
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• 제21권B호
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• pp.195-203
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• 2001

The purpose of this study is to estimate ultimate uplift capacity of permanent anchor which was cast into weathered rock. The ultimate uplift capacity was estimated from the load-displacement curve of four different anchors which have different bond length. The creep test was performed for 15minutes under the maximum load of each step in order to understand the load-transfer property of permanent anchor and to decide which anchor to choose. The destruction range of soil due to the changes in load was estimated by installing dial gauge on the ground which was cast into the weathered rock. Ultimately, the study on the behavior of the anchor case into the weathered rock was performed by comparing and analyzing the estimated result of the UUC obtained by the full scale pull out test in the field with the exsting theoretical and practical results of soil and rock anchor.

• 한국전자파학회논문지
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• 제25권1호
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• pp.53-61
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• 2014

본 논문에서는 고조파 정합 기법을 이용하여 고효율 GaN HEMT 전력 증폭기를 설계 및 제작하고, 그 특성을 측정하였다. 고효율 특성을 얻기 위해 고조파 로드풀 시뮬레이션을 활용하였다. 즉, 기본 주파수뿐만 아니라 2차, 3차 등의 고조파에서 최적의 부하 임피던스를 찾아내었다. 이러한 고조파 로드풀 시뮬레이션 결과를 바탕으로 출력 정합 회로를 설계하였다. 제작한 전력 증폭기는 중심 주파수 1.85 GHz에서 선형 전력 이득 20 dB 및 33.7 dBm의 $P_{1dB}$(1 dB gain compression point) 특성을 보였다. 그리고, 출력 전력 38.6 dBm에서 80.9 %의 최대 전력 부가 효율(Power Added Efficiency: PAE)을 나타냈으며, 이는 기존에 설계된 고효율 전력 증폭기와 비교했을 때 아주 우수한 효율 특성이다. 또한, W-CDMA 신호입력에 대한 측정 결과, 28.4 dBm의 평균 출력 전력에서 27.8 %의 PAE와 5 MHz offset 주파수에서 -38.8 dBc의 ACLR (Adjacent Channel Leakage Ratio)을 보였다. 그리고, 다항식 맞춤 방식의 디지털 전치 왜곡(Digital Predistortion: DPD) 선형화 알고리듬을 구현하여 제작된 전력 증폭기의 ACLR을 6.2 dB 정도 향상시킬 수 있었다.

• 한국구조물진단유지관리공학회 논문집
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• 제26권6호
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• pp.73-81
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• 2022

최근 구조물의 사용연한이 증가함에 따라 다양한 요인에 의해 철근이 부식되어 구조물의 내하력이 감소하는 문제들이 발생하고 있다. 이를 해결하기 위하여 내식성, 경량성, 고인장강도를 갖는 FRP 보강근의 부착특성에 대한 연구가 활발히 진행중이나, 콘크리트에 매립된 격자형 CFRP 보강재의 부착특성에 관한 연구는 미흡한 실정이다. 따라서 격자형 CFRP 보강재를 철근의 대체재로 사용하고 사용성 측면에서 부착특성을 평가하기 위해, 격자형 CFRP 보강재의 종방향 부착길이와 횡방향 격자길이를 변수로 하여 직접인발시험을 수행하였다. 이를 통해 격자형 CFRP 보강재의 부착하중-슬립 곡선을 도출하였으며, 부착거동을 분석하였다. 총 부착하중 식은 종방향 부착길이의 부착력과 횡방향 격자의 전단력의 합으로 제안하였으며, 부착하중-슬립곡선의 면적을 전체 일로 표현하여 슬립량에 대한 에너지 소산량의 변화를 분석하여 횡방향 격자가 부착력에 미치는 영향에 대하여 검토하였다.

• 국제초고층학회논문집
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• 제4권4호
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• pp.249-259
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• 2015

This paper introduces the structural design and construction method for the foundation of the TOKYO SKYTREE, a new digital broadcasting tower in Tokyo, which has a height of 634 meters. The surface layer of the ground is occupied by soft soil, thus the foundation of this tower is an SRC continuous underground wall pile, designed and developed to have horizontal rigidity and pull-out resistance. The structural integrity and construction method of the wall pile was verified with an on-site full scale pull-out test concluding a maximum load of 40,000 kN.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2000년도 전력전자학술대회 논문집
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• pp.489-492
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• 2000

A novel low-cost simple and unity-power-factor electronic ballast is presented. The proposed electronic ballast employs a bypassing capacitor and load networks composed of ballast capacitors and small charge pump capacitors as power factor correction circuit combined with the secondary winding of the transformer in the self-excited current-fed push-pull resonant inverter(CF-PPRI) resulting in cost-effectiveness and higher efficiency. By analyzing the principles of power factor correction mathematically optimum design guidelines are presented. Since the lamps are used in power factor correction stage the input power is automatically adjusted according to the number of the lamps.

• 한국건축시공학회:학술대회논문집
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• 한국건축시공학회 2014년도 춘계 학술논문 발표대회
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• pp.238-239
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• 2014

It is well known that the bond characteristics of fiber govern the performance of fiber reinforced composite material. A preliminary study was carried out to investigate the pull-out behavior of amorphous and conventional single fiber in cement mortar in accordance with the JCI(Japan Concrete Institute) SF-8. The test was performed under displacement control, and results showed that the bond strength decreased with increasing fiber length. In addition, the amorphous steel fiber showed much higher pull-out load per unit weight compared to conventional steel fiber.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 학술대회 논문집 전문대학교육위원
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• pp.113-116
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• 2003

BiCMOS circuit consist of CMOS part which constructs logic function, and bipolar part which drives output load. In this paper, proposes a method for efficiently generating test pattern which detect faults in BiCMOS circuits. In proposed method, BiCMOS circuit is divided into pull-up part and pull-down part, using structural property of BiCMOS circuit, and we generate test pattern using set theory for efficiently detecting faults which occured each divided blocks.

• 전기학회논문지P
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• 제53권1호
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• pp.22-27
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• 2004

BiCMOS circuit consist of CMOS part which constructs logic function, and bipolar part which drives output load. In BiCMOS circuits, transistor stuck-open faults exhibit delay faults in addition to sequential behavior. In this paper, proposes a method for efficiently generating test pattern which detect stuck-open in BiCMOS circuits. In proposed method, BiCMOS circuit is divided into pull-up part and pull-down part, using structural property of BiCMOS circuit, and we generate test pattern using set theory for efficiently detecting faults which occured each divided blocks.

• 전자공학회논문지A
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• 제33A권2호
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• pp.184-195
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• 1996

Beause BiCMOS logic circuits consist of CMOS part which constructs logic function and bipolar part which drives output load, the effect of short faults on BiCMOS logic circuits represented different types from that on CMOS. This paper proposes new test method which detects short faults on BiCMOS logic circuits using current path graph. Proposed method transforms BiCMOS circuits into raph constructed by nodes and edges using extended switch-level model and separates the transformed graph into pull-up part and pull-down part. Also, proposed method eliminates edge or add new edge, according ot short faults on terminals of transistor, and can detect short faults using current path graph that generated from on- or off-relations of transistor by input patterns. Properness of proposed method is verified by comparing it with results of spice simulation.