Test Pattern Generation for Detection of faults in BiCMOS Circuits

BiCMOS 회로의 고장 검출을 위한 테스트 패턴 생성

BiCMOS circuit consist of CMOS part which constructs logic function, and bipolar part which drives output load. In this paper, proposes a method for efficiently generating test pattern which detect faults in BiCMOS circuits. In proposed method, BiCMOS circuit is divided into pull-up part and pull-down part, using structural property of BiCMOS circuit, and we generate test pattern using set theory for efficiently detecting faults which occured each divided blocks.