• 제목/요약/키워드: Link-up operation

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analysis of three-phase current type PWM converter using resonant DC Link snubber (공진 DC 링크 스너버를 이용한 3상 전류형 PWM 컨버터의 해석)

  • Lee, S.H.;Mun, S.P.;Suh, K.Y.;Kim, Y.M.;Kang, W.J.
    • Proceedings of the KIEE Conference
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    • 2002.06a
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    • pp.55-59
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    • 2002
  • This paper presents a novel three-phase current-fed Pulse Width Modulation converter with switched capacitor type resonant DC link commutation circuit operating PWM pattern strategy under a design consideration of low-pass filter, which can operate on the basis of the principle of zero current soft switching commutation. In the first place, the steady state operating principle of this converter with a new resonant DC link snubber circuit is described in connection with the equivalent operation circuit, together with the practical design procedure of the switched-capacitor type resonant DC link circuit is discussed from a theoretical viewpoint on the basis of a design example for high-power applications. The actively delayed time correction method to compensate distorted currents due to a relatively long resonant commutation time is newly implemented in the open loop control scheme so as to acquire the new optimum PWM pattern. Finally, the experiment of set-up in laboratory system of this converter is concretely demonstrated herein to confirm a zero current soft-switching commutation of this converter. The comparative evaluations between current -fed hard switching PWM and soft-switching PWM converters are carried out from a viewpoint of their PWM converter characteristics.

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Development of Boost Chopper with Built New Renewable Energy in Grid-Connected Distributed Power System (승압 초퍼 기능이 내장된 새로운 태양광 발전용 파워컨디셔너의 개발)

  • Mun, Sang-Pil;Lee, Su-Haeng;Kim, Young-Mun
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.63 no.4
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    • pp.361-367
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    • 2014
  • This paper is related to a new solar power conditioner for a built-in step-up chopper function. In the first step-up chopper proposed solar PV power conditioner for mutually connected in series with the input voltage of the bypass diodes are respectively connected to the positive terminal should install the mutual boosting chopper diode connected in series with the boost chopper switching element between the two power supply and at the same time the first and the second was connected to a second diode and a resonance inductor and a snubber capacitor in series with each other. And the common connection point between the bypass diode and the step-up chopper and the step-up chopper diode common connection point of the switching elements of the input voltage was set to the boost inductor for storing energy. In addition, between the step-up chopper and the step-up chopper diode and a switching element of a joint connection point of the first auxiliary diode and the second common connection point of the auxiliary diode was provided, the resonance capacitor. Between the step-up chopper and the step-up chopper diode and a switching element of a joint connection point and the common connection point of the resonance inductor snubber capacitor and connecting the third secondary diode, between two power supply lines is characterized by configuring the DC link capacitor bus lines in parallel. Therefore, it is possible to suppress the switching loss through, DC link bus lines, as well as there could seek miniaturization and weight reduction of the power conditioner itself by using a common capacitor of the non-polar non-polar electrolytic capacitor having a capacitor, the service life of the circuit can be extended and it is possible to greatly reduce the loss can be greatly improve the reliability of the product and the operation of the product itself.

A Viterbi Decoder with Efficient Memory Management

  • Lee, Chan-Ho
    • ETRI Journal
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    • v.26 no.1
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    • pp.21-26
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    • 2004
  • This paper proposes a new architecture for a Viterbi decoder with an efficient memory management scheme. The trace-back operation is eliminated in the architecture and the memory storing intermediate decision information can be removed. The elimination of the trace-back operation also reduces the number of operation cycles needed to determine decision bits. The memory size of the proposed scheme is reduced to 1/($5{\times}$ constraint length) of that of the register exchange scheme, and the throughput is increased up to twice that of the trace-back scheme. A Viterbi decoder complying with the IS-95 reverse link specification is designed to verify the proposed architecture. The decoder has a code rate of 1/3, a constraint length of 9, and a trace-forward depth of 45.

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Development of 6kW ZVS Boost Converter by 4-Parallel Operation (4-병렬 제어 기법을 적용한 6kW 영전압 스위칭 승압형 컨버터 개발)

  • Rho, Min-Sik
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.58 no.1
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    • pp.86-92
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    • 2009
  • This paper presents development of 6kw ZVS(Zero Voltage Switching) boost converter by 4-parallel operation. To realize a high capacity converter with 6 kw, 4-parallel operation of 1.5kW unit module is proposed in this paper. To meet high ratio input to output voltage, isolated type booster converter is designed. To achieve ZVS operation of 4-switches of full bridge and protect a voltage overshoot caused by switch turn-off, simple active-clamp circuit is applied to the primary side. For parallel operation of 4-modules, master-slave control method is proposed to achieve input current sharing of 4-unit converter modules accurately. For performance tests, simulation is carried out. Also, load and experimental tests of the developed booster converter, 230Vdc/6kW, are carried out under various conditions. For field tests, the developed converter is applied for boosting a battery power to high DC_link voltage for a VSI inverter which starts a micro-turbine(MT) installed in vehicle and it's performance is verified through high speed motoring a MT up to tens of thousands of rpm.

A Capacitor-Charging Power Supply Using a Series-Resonant Three-Level Inverter Topology

  • Song I. H.;Shin H. S.;Choi C. H.
    • Proceedings of the KIPE Conference
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    • 2001.10a
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    • pp.301-303
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    • 2001
  • In this paper we present a Capacitor Charging Power Supply (CCPS) using a series-resonant three-level inverter topology to improve voltage regulation and use semiconductor switches having low blocking voltage capability such as MOSFETs. This inverter can be operated with two modes, Full Power Mode (FPM) and Half Power Mode (HPM). In FPM inverter supplies the high frequency step up transformer with full DC-link voltage and in HPM with half DC-link voltage. HPM switching method will be adopted when CCPS output voltage reaches the preset target value and operates in refresh mode-charge is maintained on the capacitor. In this topology each semiconductor devices blocks a half of the DC-link voltage[2]. A 15kW, 30kV CCPS has been built and will be tested for an electric precipitator application. The CCPS operates from an input voltage of 500VDC and has a variable output voltage between 10 to 30kV and 1kHz repetition rate at 44nF capacitive load [3]. A resonant frequency of 67.9kHz was selected and a voltage regulation of $0.83\%$ has been achieved through the use of half power mode without using the forced cut off the switch current [1]. The theory of operation, circuit topology and test results are given.

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Code Optimization Techniques to Reduce Energy Consumption of Multimedia Applications in Hybrid Memory

  • Dadzie, Thomas Haywood;Cho, Seungpyo;Oh, Hyunok
    • IEIE Transactions on Smart Processing and Computing
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    • v.5 no.4
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    • pp.274-282
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    • 2016
  • This paper proposes code optimization techniques to reduce energy consumption of complex multimedia applications in a hybrid memory system with volatile dynamic random access memory (DRAM) and non-volatile spin-transfer torque magnetoresistive RAM (STT-MRAM). The proposed approach analyzes read/write operations for variables in an application. Based on the profile, variables with a high read operation are allocated to STT-MRAM, and variables with a high write operation are allocated to DRAM to reduce energy consumption. In this paper, to optimize code for real-life complicated applications, we develop a profiler, a code modifier, and compiler/link scripts. The proposed techniques are applied to a Fast Forward Motion Picture Experts Group (FFmpeg) application. The experiment reduces energy consumption by up to 22%.

Bin-picking method using laser

  • Joo, Kisee;Han, Min-Hong
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 1995.04a
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    • pp.306-315
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    • 1995
  • This paper presents a bin picking method using a slit beam laser in which a robot recognizes all of the unoccluded objects from the top of jumbled objects, and picks them up one by one. Once those unoccluded objects are removed, newly developed unoccluded objects underneath are recognized and the same process is continued until the bin gets empty. To recognize unoccluded objects, a new algorithm to link edges on slices which are generated by the orthogonally mounted laser on the xy table is proposed. The edges on slices are partitioned and classified using convex and concave function with a distance parameter. The edge types on the neighborhood slices are compared, then the hamming distances among identical kinds of edges are extracted as the features of fuzzy membership function. The sugeno fuzzy integration about features is used to determine linked edges. Finally, the pick-up sequence based on MaxMin theory is determined to cause minimal disturbance to the pile. This proposed method may provide a solution to the automation of part handling in manufacturing environments such as in punch press operation or part assembly.

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A Study on Fuel Cell Inverter Operation for Distributed Generation (분산전원용 연료전지 인버터 운전에 관한 연구)

  • Jang S.J.;Lee T.W.;Song S.H.;Kim J.H.;Won C.Y.;Kim Y.H.
    • Proceedings of the KIPE Conference
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    • 2003.07b
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    • pp.981-986
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    • 2003
  • Recently, a fuel cell is remarkable for new generation system. The fuel cell generation system converts the chemical energy of a fuel directly into electrical energy. The fuel cell generation is characterized by low voltage and high current. For connecting to utility, it needs both a step up converter and an inverter. The step up converter makes DC link and the inverter changes D.C to A.C. In this paper, full bridge converter and the single phase inverter are designed and installed for fuel cell. Simulation and experiment verify that fuel cell generation system could be applied for the distributed generation.

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An Experimental Study on the Clutch Type Water Pump of Diesel Passenger Vehicle for Reducing Fuel Consumption and CO2 Emission (연비 개선 및 CO2 저감을 위한 승용디젤 차량의 클러치타입 워터펌프 적용에 따른 실험적 연구)

  • Jeong, Soo-Jin;Park, Jung-Kwon;Oh, Chang-Boke;Cho, Yong-Seok
    • Transactions of the Korean Society of Automotive Engineers
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    • v.20 no.2
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    • pp.123-134
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    • 2012
  • A typical cooling system of an engine relies on a water pump that circulates the coolant through the system. The pump is typically driven by the crankshaft through a mechanical link with engine starting. In order to reduce the friction and warm-up time of an engine, the clutch-type water pump (CWP) was applied in 2.0 liter diesel vehicle. The clutch-type water pump can force cooling water to supply into an engine by the operation of an electromagnetic clutch equipped as the inner part of pump system. The onset of CWP is decided by temperature of cooling water and engine oil. And, the control logic for an optimal operation of the clutch-type water pump was developed and applied in engine and vehicle tests. In this study, the warm-up time was measured with the conventional water pump and clutch-type water pump in engine tests. And the emission and the fuel consumption were evaluated under NEDC mode in vehicle tests. Also, tests were carried out for the various temperature conditions starting the operation of CWP. From the results of the study, the application of CWP can improve the fuel consumption and $CO_2$ reduction by about 3%.

Design of high-speed preamble searcher adequate for RACH preamble structure in WCDMA reverse link receiver (RACH 프리앰블 구조에 적합한 WCDMA 역방향 링크 수신기용 고속 프리앰블 탐색기의 설계)

  • 정은선;도주현;이영용;정성현;최형진
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.8A
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    • pp.898-908
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    • 2004
  • In this paper, we propose a high speed preamble searcher feasible for RACH(Random Access Channel) preamble structure in WCDMA reverse link receiver. Unlike IS-95, WCDMA system uses AISMA(Acquisition Indication Sense Multiple Access) process. Because of the time limit between RACH preamble transmission and AI(Acquisition Indicators), and the restriction on the number of RACH signatures assigned to RACH preamble, fast acquisition indication is required for efficient operation. The preamble searcher proposed in this paper is based on 2-antenna system and has adopted FHT algorithm that has the radix-2 16 point FFT structure. The acquisition speed using FHT is 64 times faster than the conventional method that correlates each signature. Based on their fast aquisition scheme, we improved the acquisition performance by calculating the correlation up to the 4096 chips of the total preamble length. The performance is analyzed by using Neyman-pearson method. The proposed algorithm has been applied for the implementation of WCDMA reverse link receiver modem successfully.