• Journal of Power Electronics
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• v.9 no.1
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• pp.18-25
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• 2009

Conventional series-resonant pulse frequency modulation controlled DC-DC high power converters with a high-frequency transformer link which is designed for driving the high power microwave generator has the problem of hard switching commutation at turn-on and turn-off of active power switching devices. This problem is due to the influence of the magnetizing current of the high-frequency transformer. This paper presents a novel prototype for a high-frequency transformer using parasitic parameters with a lossless inductive snubber and a series resonant capacitor assisted series-resonant zero current switching pulse frequency modulated DC-DC power converter, which is designed using a high power magnetron for microwave ovens. In order to implement a complete and efficient soft switching commutation, the performance of the new converter topology is practically confirmed and evaluated in the prototype of a power microwave generator.

• Proceedings of the KIPE Conference
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• 2012.07a
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• pp.45-46
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• 2012

본 논문에서는 멀티레벨 인버터에서 발생하는 DC Link 단의 커패시터 불 평형 문제를 해결하고자 새로운 DC 전압 균형을 위한 스위칭 방식에 대해 제안한다. 제안한 방식은 DC-Link 단에 위치한 각각의 커패시터들의 전압을 센싱하고 이를 PI제어를 통해 스위칭 신호를 제어함으로써 각각의 커패시터에 걸리는 전압을 균일하게 만듦으로써, 커패시터단의 전압 불 평형을 개선하였으며, 이를 3상 2레벨 멀티-레벨 인버터를 이용한 시뮬레이션 결과를 통해 본 논문의 타당성을 검증하였다.

• Proceedings of the KIPE Conference
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• 2015.11a
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• pp.65-66
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• 2015

본 논문에서는 단상 다이오드 정류기와 소용량 직류단 캐패시터를 가지는 전동기 구동 시스템에서 계통 전류에 최소 고조파 전류 주입을 통하여 직류단 전압을 높이는 방법을 제안한다. 소용량 직류단 캐패시터를 가지는 전동기 구동 시스템은 직류단전압이 맥동하게 되는데 직류단 전압이 낮은 부분에서는 과도한 약자속 전류가 필요하게 된다. 기존의 연구에서는 직류단 전압을 확보하기 위해 직류단 최소 전압을 설정하는 방법이 제안되었다. 하지만 계통 전류의 고조파 규정 때문에 직류단 최소 전압을 높이는 것은 한계가 있다. 제안된 방법에서는 계통 전류에 고조파를 주입함으로써 기존의 한계보다 더 높은 직류단 최소 전압을 가지면서도 계통 전류의 고조파 규정을 만족시킬 수 있도록 한다. 제안된 방법은 시뮬레이션을 통해 그 타당성을 검증한다.

• Journal of Power Electronics
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• v.19 no.6
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• pp.1486-1495
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• 2019

Dealing with the DC link fault poses a technical problem for an HVDC based on a modular multilevel converter. The fault suppressing mechanisms of several sub-module topologies with DC fault current blocking capacity are examined in this paper. An improved half-bridge sub-module topology with double direction control switch is also designed to address the additional power consumption problem, and a sub-module topology called hybrid double direction blocking sub module (HDDBSM) is proposed. The DC fault suppression characteristics and sub-module capacitor voltage balance problem is also analyzed, and a self-startup method is designed according to the number of capacitors. The simulation model in PSCAD/EMTDC is built to verify the self-startup process and the DC link fault suppression features.

• Proceedings of the KSR Conference
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• 2007.05a
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• pp.809-815
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• 2007

This paper proposes the analysis on new equipment for power quality in electrified railway. The proposed equipment consists of series and parallel inverter. Each inverter is connected by capacitor as dc link. This structure can be compensated for active and reactive power in catenary through transformer.

• Proceedings of the KSR Conference
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• 2004.10a
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• pp.1396-1401
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• 2004

This paper proposes analysis on new equipment for power quality in electric railway. The Proposed equipment consists of series inverter and parallel inverter. Each inverter is connected by capacitor as de link. This structure can be compensated for active and reactive power in catenary through transformer.

• Proceedings of the KSR Conference
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• 2005.11a
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• pp.649-654
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• 2005

This paper proposes analysis on new equipment for power quality in electric railway. The proposed equipment consists of series inverter and parallel inverter. Each inverter is connected by capacitor as dc link. This structure can be compensated for active and reactive power in catenary through transformer.

• Proceedings of the KSR Conference
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• 2006.11b
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• pp.921-927
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• 2006

This paper proposes the analysis on new equipment for power quality in electrified railway. The proposed equipment consists of series and parallel inverter. Each inverter is connected by capacitor as dc link. This structure can be compensated for active and reactive power in catenary through transformer.

• Journal of Power Electronics
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• v.14 no.2
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• pp.292-301
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• 2014

This paper presents a new configuration for a three-phase multilevel voltage source inverter. The main bridge is built from a classical three-phase two-level inverter and three bidirectional switches. A variable DC-link employing two unequal DC voltage supplies and four switches is connected to the main circuit in such a way that the proposed inverter produces four levels in the output voltage waveform. In order to obtain the desired switching gate signals, the fundamental frequency staircase modulation technique is successfully implemented. Furthermore, the proposed structure is extended and compared with other types of multilevel inverter topologies. The comparison shows that the proposed inverter requires a smaller number of power components. For a given number of voltage steps N, the proposed inverter requires N/2 DC voltage supplies and N+12 switches connected with N+7 gate driver circuits, while diode clamped or flying capacitor inverters require N-1 DC voltage supplies and 6(N-1) switches connected with 6(N-1) gate driver circuits. A prototype of the introduced configuration has been manufactured and the obtained simulation and experimental results ensure the feasibility of the proposed topology and the validity of the implemented modulation technique.

• Proceedings of the KIPE Conference
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• 2009.11a
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• pp.219-221
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• 2009

태양전지 어레이(PV-array)로부터 발전되는 DC 전력을 AC로 변환시켜 계통으로 발전시키는 역할을 하는 태양광 발전 시스템용 PCS의 스위칭 회로 Topology로는 일반적으로 3상 풀브리지 회로가 사용된다. 이러한 3상 풀브리지 회로 시스템의 수명예측을 위해 DC link 단의 커패시터의 커패시턴스를 계산하여 커패시턴스의 감소정도를 이용하여 전체 시스템의 수명을 예측하게 된다. 이러한 커패시터의 상태를 추정하기 위해서는 시스템을 정지시킨 후 커패시터를 분리하여 커패시턴스를 측정하는 방법, 특정 주파수의 전류(일반적으로 저주파)를 주입하고 주입한 전류의 주파수에 해당하는 전류 및 전압을 검출하여 capacitance 연산하는 방식등이 이용된다. 시스템을 정지시킨 후 커패시터를 분리하여 커패시턴스를 측정하는 방법은 번거로우며, 전류 주입을 이용한 방식은 불필요한 고조파 전류가 계통으로 침투하는 단점을 가진다. 그러므로 본 연구에서는 모듈타입 PCS 이용시 계통으로 고조파 침투가 없는 비침투 커패시턴스 계산 알고리즘을 제안한다.