• Title/Summary/Keyword: Linear Power Amplifier

Search Result 207, Processing Time 0.023 seconds

Improving the PTS Method for the PAPR Reduction in the OFDM System (OFDM 시스템에서 PAPR 감소를 위한 PTS 기법의 성능개선)

  • Kim, Dong-Seek;Kwak, Min-Gil;Cho, Hyung-Rae
    • Journal of Advanced Marine Engineering and Technology
    • /
    • v.34 no.8
    • /
    • pp.1165-1171
    • /
    • 2010
  • The OFDM system has better characteristics in transmission rate, power efficiency, bandwidth efficiency, impulse-noise immunity, and narrow band interference immunity etc. in comparison with other conventional systems. However, high PAPR of an OFDM signals causes some serious non-linear processing of RF amplifier. And performance of the communication system gets worse. Therefore, various methods reducing PAPR of an OFDM skills such as the clipping method, block coding method, and phase rotation method etc. have been researched. In this paper, we propose a high-speed adaptive PTS method which eliminates high PAPR. And we compare the proposed method with other conventional methods. The proposed method has decreased quantity of calculation compare with an adaptive PTS method. Of course, The more its calculation amount is decreased, the more its BER characteristic is not better than an adaptive PTS method. However, keeping up satisfactory BER performance, we highly improved calculation amount of a PTS method.

A Study on Binary CDMA System Correlator Design for High-Speed Acquisition Processing (고속 동기 처리를 위한 Binary CDMA 시스템 코릴레이터 설계에 관한 연구)

  • Lee, Seon-Keun;Jeong, Woo-Yeol
    • Journal of the Korea Society of Computer and Information
    • /
    • v.12 no.1 s.45
    • /
    • pp.155-160
    • /
    • 2007
  • Because output of multi-code CDMA system adapted high speed data transmission becoming multi-level system use linear amplifier in output stage and complex output signal. Therefore, Multi-Code CDMA system has shortcoming of high price, high complexity etc.. Binary CDMA technology that allow fetters in existing CDMA technology to supplement this shortcoming proposed. In binary CDMA system When correlator process high speed data, bottle-neck phenomenon is happened on synchronization acquisition process, it is very important parameter. Because existent correlator must there be advantage that power consumption is small but flow addition of several stages to receive correlation's value, the processing speed has disadvantage because the operation amount is much. Therefore in this paper, proposed correlator has characteristic such as data is able to high speed processing, chip area is independent and power consumption is constant in structure in binary CDMA system.

  • PDF

A Design of Correlator with the PBS Architecture in Binary CDMA System (Binary CDMA 시스템에서 PBS 구조를 가지는 코릴레이터 설계)

  • Lee, Seon-Keun;Jeong, Woo-Yeol
    • The Journal of the Korea institute of electronic communication sciences
    • /
    • v.3 no.3
    • /
    • pp.177-182
    • /
    • 2008
  • Because output of multi-code CDMA system adapted high speed data transmission becoming multi-level system use linear amplifier in output stage and complex output signal. Therefore, Multi-Code CDMA system has shortcoming of high price, high complexity etc. Binary CDMA technology that allow fetters in existing CDMA technology to supplement this shortcoming proposed. In binary CDMA system When correlator process high speed data, bottle-neck phenomenon is happened on synchronization acquisition process, it is very important parameter. Because existent correlator must there be advantage that power consumption is small but flow addition of several stages to receive correlation's value, the processing speed has disadvantage because the operation amount is much. Therefore in this paper, proposed correlator has characteristic such as data is able to high speed processing, chip area is independent and power consumption is constant in structure in binary CDMA system.

  • PDF

Design of an OTA Improving Linearity with a Mobility Compensation Technique (이동도 보상 회로를 이용한 OTA의 선형성 개선)

  • 김규호;양성현;김용환;조경록
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.40 no.12
    • /
    • pp.46-53
    • /
    • 2003
  • This paper describes a new linear operational transconductance amplifier (OTA) and its application to the 9th-order Bessel filter. To improve the linearity of the OTA, we employ a mobility compensation technique. The combination of the triode and the subthreshold region transistors can compensate the mobility reduction effect and make the OTA with a good linearity. The proposed OTA shows $\pm$0.32% Gm variation over the input range of $\pm$0.8-V. The total harmonic distortion (THD) was lower than -60-㏈. The 9th-order Bessel filter has been designed using a 0.35-${\mu}{\textrm}{m}$ n-well CMOS process under 3.3-V supply voltage. It shows the cutoff frequency of 8-MHz and the power consumption of 65-mW.

A RF MEMS Transmitter Based on Flexible Printed Circuit Boards (연성 인쇄 회로 기판을 이용한 초고주파 MEMS 송신기 연구)

  • Myoung, Seong-Sik;Kim, Seon-Il;Jung, Joo-Yong;Yook, Jong-Gwan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.19 no.1
    • /
    • pp.61-70
    • /
    • 2008
  • This paper presents the flexible MEMS transmitter based on flexible printed circuit board or FPCB, which can be transformed to arbitrary shape. The FPCB is suitable to fabricate light weight and small size modules with the help of its thin thickness. Moreover a module based on FPCB can be attached on the arbitrary curved surface due to its flexible enough to be lolled up like paper. In this paper, the flexible MEMS transmitter integrated on FPCB for a short-distance sensor network which is based on orthogonal frequency division multiplexing(OFDM) communication system is proposed. The active device of the proposed flexible MEMS transmitter is fabricated on InGaP/GaAs HBT process which has been used for power amplifier design to take advantages of high linear and high efficient characteristics. Moreover, the passive devices such as the filter and signal lines are integrated and fabricated on the FPCB board. The performance of the fabricated flexible MEMS transmitter is analyzed with EVM characteristics of the output signal.

A Study on Polynomial Pre-Distortion Technique Using PAPR Reduction Method in the Next Generation Mobile Communication System (차세대 이동통신 시스템에 PAPR 감소기법을 적용한 다항식 사전왜곡 기법에 관한 연구)

  • Kim, Wan-Tae;Park, Ki-Sik;Cho, Sung-Joon
    • Journal of Advanced Navigation Technology
    • /
    • v.14 no.5
    • /
    • pp.684-690
    • /
    • 2010
  • Recently, the NG(Next Generation) system is studied for supporting convergence of various services and multi mode of single terminal. And a demand of user for taking the various services is getting increased, for supporting these services, many systems being able to transmit a large message have been appeared. In the NG system, it has to be supporting the CDMA and WCDMA besides the tele communication systems using OFDM method with single terminal An intergrated system can be improved with adopting of SoC technique. For adopting SoC technique on the intergrated terminal, we have to solve the non linear problem of HPA(High Power Amplifier). Nonlinear characteristic of HPA distorts both amplitude and phase of transmit signal, this distortion cause deep adjacent channel interference. We adopt a polynomial pre-distortion technique for this problem. In this paper, a noble modem design for NG mobile communication service and a method using polynomial pre-distorter with PAPR technique for counterbalancing nonlinear characteristic of the HPA are proposed.

Design and Fabrication of Wide Electrical Tuning Range DRO Using Open-Loop Method (개루프 방법에 의한 확장된 전기적주파수조정범위를 갖는 유전체공진기발진기의 설계 및 제작)

  • Jeong, Hae-Chang;Oh, Hyun-Seok;Yang, Seong-Sik;Yeom, Kyung-Whan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.20 no.6
    • /
    • pp.570-579
    • /
    • 2009
  • In this paper, we presented a Vt-DRO with a wide electrical frequency tuning range, using open-loop gain method. The Vt-DRO was composed of 3-stages, resonator, amplifier and phase shifter. In order to satisfy an oscillation condition, we determined magnitude and phase of each stage. The measured S-parameter of cascaded 3-stages shows open-loop oscillation condition. Also, using measured open loop group delay, we derived the relation for electrical frequency tuning range. The Vt-DRO was implemented by connecting the input and the output of the designed open-loop and resulted in closed-loop. As a results, tuning-range of Vt-DRO is 82 MHz, which is close to the predicted results for tuning voltage 0${\sim}$10 V and shows linear frequency tuning at the center frequency of 5.3 GHz. The phase noise is -104 ${\pm}$1 dBc/Hz at 100 kHz offset frequency and power is 5.86${\pm}$1 dBm respectively.