• Journal of the Semiconductor & Display Technology
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• v.21 no.3
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• pp.1-6
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• 2022

Modern computer systems usually have special hardware for operations used in deep learning workload even edge computing environment. Non-volatile memories (NVMs) have been considered for alternative memory storage because they consume little static energy and occupy small area. However, there is a problem for NVMs to be directly adopted. An NVM cell has limited write endurance, so that the lifetime of NVM-based memory system is much shorter than that of conventional memory system. To overcome this problem for the deep learning system, this paper proposes a novel method to extend the lifetime based on the analysis of the deep learning workloads. If an incoming block has more than a predefined number of frequently used values, the cacheline is defined as write friendly block. During the victim selection, the cacheline has lower possibility to be chosen as victim. The experimental results show that the lifetime is increased by about 50% and energy consumption is decreased by 3% with a little performance hurt.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.31-32
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• 2010

In our previous reports [1-3], electron transport for the switching and memory devices using alkyl thiol-tethered Ru-terpyridine complex compounds with metal-insulator-metal crossbar structure has been presented. On the other hand, among organic memory devices, a memory based on the OFET is attractive because of its nondestructive readout and single transistor applications. Several attempts at nonvolatile organic memories involve electrets, which are chargeable dielectrics. However, these devices still do not sufficiently satisfy the criteria demanded in order to compete with other types of memory devices, and the electrets are generally limited to polymer materials. Until now, there is no report on nonvolatile organic electrets using nano-interfaced organic monomer layer as a dielectric material even though the use of organic monomer materials become important for the development of molecularly interfaced memory and logic elements. Furthermore, to increase a retention time for the nonvolatile organic memory device as well as to understand an intrinsic memory property, a molecular design of the organic materials is also getting important issue. In this presentation, we report on the OFET memory device built on a silicon wafer and based on films of pentacene and a SiO2 gate insulator that are separated by organic molecules which act as a gate dielectric. We proposed push-pull organic molecules (PPOM) containing triarylamine asan electron donating group (EDG), thiophene as a spacer, and malononitrile as an electron withdrawing group (EWG). The PPOM were designed to control charge transport by differences of the dihedral angles induced by a steric hindrance effect of side chainswithin the molecules. Therefore, we expect that these PPOM with potential energy barrier can save the charges which are transported to the nano-interface between the semiconductor and organic molecules used as the dielectrics. Finally, we also expect that the charges can be contributed to the memory capacity of the memory OFET device.[4]

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.12 no.4
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• pp.141-145
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• 2012

In a Ubiquitous sensor network environment, the sensor node is in general small and low price, and operating with power limited battery. The reliable TCP/IP protocol is used for transmitting sensed data from the sensor node. A new method was proposed in order to overcome the limitation of small embedded memory, but it is difficult to use for the case of frame error. In this paper, a new algorithm is proposed to manage the receiving frame error or loss, and it is appropriate to the sensor network to send sensed data periodically.

• Proceedings of the IEEK Conference
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• 2003.11b
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• pp.19-22
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• 2003

Class area is a portion of memory where the constants, fields, and codes of the classes loaded into the Java virtual machine are kept. Knowing the site of the class area is very important especially for embedded Java system with limited memory resources. This paper induces a formula which makes it possible estimate the size of the area. The formula needs some constant values specific to target JVM implementation. We also show that these values can be found using some simple probe classes. An experimental result is included in this paper to confirm the correctness of our approach.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.5
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• pp.1036-1044
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• 1997

We modify the montgomery modeular multikplication to extract the common parts in common-multiplicand multi-plications. Since the modified method computes the common parts in two modular multiplications once rather than twice, it can speed up the exponentiations and reduce the amount of storage tables in m-ary or windowexponentiation. It can be also applied to an exponentiation mehod by folding the exponent in half. This method is well-suited to the memory limited environments such as IC card due to its speed and requirement of small memory.

• ETRI Journal
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• v.25 no.3
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• pp.179-186
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• 2003

Using biometrics to verify a person's identity has several advantages over the present practices of personal identification numbers (PINs) and passwords. At the same time, improvements in VLSI technology have recently led to the introduction of smart cards with 32-bit RISC processors. To gain maximum security in verification systems using biometrics, verification as well as storage of the biometric pattern must be done in the smart card. However, because of the limited resources (processing power and memory space) of the smart card, integrating biometrics into it is still an open challenge. In this paper, we propose a fingerprint verification algorithm using a multi-resolution accumulator array that can be executed in restricted environments such as the smart card. We first evaluate both the number of instructions executed and the memory requirement for each step of a typical fingerprint verification algorithm. We then develop a memory-efficient algorithm for the most memory-consuming step (alignment) using a multi-resolution accumulator array. Our experimental results show that the proposed algorithm can reduce the required memory space by a factor of 40 and can be executed in real time in resource-constrained environments without significantly degrading accuracy.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.1
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• pp.68-76
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• 2015

Phase-change memory (PCM) is a promising technology that is anticipated to be used in the memory hierarchy of future computer systems. However, its access time is relatively slower than DRAM and it has limited endurance cycle. Due to this reason, PCM is being considered as a high-speed storage medium (like swap device) or long-latency memory. In this paper, we adopt PCM as a virtual memory swap device and present a new page replacement policy that considers the characteristics of PCM. Specifically, we aim to reduce the write traffic to PCM by considering the dirtiness of pages when making a replacement decision. The proposed replacement policy tracks the dirtiness of a page at the granularity of a sub-page and replaces the least dirty page among pages not recently used. Experimental results with various workloads show that the proposed policy reduces the amount of data written to PCM by 22.9% on average and up to 73.7% compared to CLOCK. It also extends the lifespan of PCM by 49.0% and reduces the energy consumption of PCM by 3.0% on average.

• Proceedings of the Korean Operations and Management Science Society Conference
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• 1999.10a
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• pp.42-46
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• 1999

Knowledge management(KM) is emerging as a robust management mechanism with which an organization can remain highly intelligent and competitive in a turbulent market. Organization memory(or knowledge) is at the heart of KM success. How to create organizational memory has been debated among researchers. In literature, a wide variety of methods for creating organizational memory have been proposed only to prove that its applicability is limited to decision-making problems which require shallow or non-causal knowledge type. However, organizational memory with a sense of causal knowledge is highly required in solving complicated decision-making problems in which complex dynamics exist between various factors and influence each other with cause and effect relationship among them. In this respect, we propose a new approach to creating a causal-typed organizational memory (CATOM), which has a form of causal knowledge and is represented in a matrix form, by using an inference diagram. An algorithm for CATOM creation is suggested and applied to an illustrative example. Results show that our proposed KM approach can effectively equip an organization with semi-automated CATOM creation and inference process which is deemed useful in a highly competitive business environment.

• KIISE Transactions on Computing Practices
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• v.20 no.9
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• pp.483-491
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• 2014

Contemporary computer systems exploits DVFS (Dynamic Voltage/Frequency Scaling) technology for balancing performance and power consumption. The efficiency of DVFS depends on how much performance we get for larger power consumption due to elevated CPU frequency. Especially for memory-bounded applications, higher CPU frequency often does not result in higher performance. In this paper, we present an upper bound of CPU frequency scaling based on memory accesses. It is observed that the performance gain due to higher CPU frequency is limited by memory accesses (last level cache misses) per instructions by experiments. Using the results, we present the CPU frequency upper bound with little performance gain. Experimental results show that for a memory-bounded application, applying the frequency upper bound enhances the energy efficiency of the application by above 30%.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.17 no.4
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• pp.143-148
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• 2017

Flash Memory which is light and strong external shock as storage of small electronics like smartphone, digital camera, car black box has been widely used. Since the operation speed of the read operation and the write operation are different from each other, and the flash memory has the feature that it is not possible to overwrite, the delete operation is added to solve these problems. Wear-leveling must also be considered, since the number of erase times of the flash memory is limited. Many studies have been conducted on the substitutional algorithms of flash memory based on these characteristics of recent flash memories. So, to solve the problem that has existing buffer replacement algorithm this thesis divide page into 6 groups and when proposed algorithm select victim page, it consider reference page frequency and page recency.