Browse > Article

Lifetime Extension Method for Non-Volatile Memory based Deep Learning System by analyzing Data Write Pattern  

Choi, Juhee (Dept. of Smart Information Communication Engineering, Sangmyung University)
Publication Information
Journal of the Semiconductor & Display Technology / v.21, no.3, 2022 , pp. 1-6 More about this Journal
Abstract
Modern computer systems usually have special hardware for operations used in deep learning workload even edge computing environment. Non-volatile memories (NVMs) have been considered for alternative memory storage because they consume little static energy and occupy small area. However, there is a problem for NVMs to be directly adopted. An NVM cell has limited write endurance, so that the lifetime of NVM-based memory system is much shorter than that of conventional memory system. To overcome this problem for the deep learning system, this paper proposes a novel method to extend the lifetime based on the analysis of the deep learning workloads. If an incoming block has more than a predefined number of frequently used values, the cacheline is defined as write friendly block. During the victim selection, the cacheline has lower possibility to be chosen as victim. The experimental results show that the lifetime is increased by about 50% and energy consumption is decreased by 3% with a little performance hurt.
Keywords
Non-Volatile Memories; Lifetime Extension; Cache Replacement Policy;
Citations & Related Records
연도 인용수 순위
  • Reference
1 Yongsoo Joo, Dimin Niu, Xiangyu Dong, Guangyu Sun, Naehyuck Chang, and Yuan Xie, "Energy- and endurance-aware design of phase change memory caches," 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010), pp. 136-141, 2010.
2 Shihao Song, Anup Das, Onur Mutlu, and Nagarajan Kandasamy, "Improving phase change memory performance with data content aware access," In: Proceedings of the 2020 ACM SIGPLAN International Symposium on Memory Management. pp. 30-47, 2020.
3 Nezam Rohbani et al, "NVDL-Cache: Narrow-Width Value Aware Variable Delay Low-Power Data Cache," 2019 IEEE 37th International Conference on Computer Design (ICCD), pp. 264-272, 2019.
4 Sam Xi et al, "SMAUG: End-to-end full-stack simulation infrastructure for deep learning workloads," ACM Transactions on Architecture and Code Optimization (TACO), Vol. 17, No. 4, pp. 1-26, 2020.
5 Jinwook Song et al., "7.1 An 11.5TOPS/W 1024-MAC Butterfly Structure Dual-Core Sparsity-Aware Neural Processing Unit in 8nm Flagship Mobile SoC," 2019 IEEE International Solid-State Circuits Conference - (ISSCC), pp. 130-132, 2019.
6 Ju Young Jeong, "Feasibility Study of Non-volatile Memory Device Structure for Nanometer MOSFET," Journal of the Semiconductor & Display Technology, Vol. 14, No. 2, pp. 41-45, 2015.
7 Brandon Reagen et al., "Minerva: Enabling Low-Power, Highly-Accurate Deep Neural Network Accelerators," 2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA), pp. 267-278, 2016.
8 Shaoli Liu et al., "Cambricon: An Instruction Set Architecture for Neural Networks," 2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA), pp. 393-405, 2016.
9 Jiasi Chen and Xukan Ran, "Deep Learning With Edge Computing: A Review," in Proceedings of the IEEE, Vol. 107, No. 8, pp. 1655-1674, Aug. 2019.   DOI
10 Tae Hyun Kim, Yang On, and Sang Yeon Jun, "Design of Asynchronous Non-Volatile Memory Module Using NAND Flash Memory and PSRAM," Journal of the Semiconductor & Display Technology Vol. 19, No.3, pp. 118-123, 2020.
11 H.-S. Philip Wong et al., "Phase Change Memory," in Proceedings of the IEEE, Vol. 98, No. 12, pp. 2201-2227, Dec. 2010.   DOI
12 Alexandre P. Ferreira, Miao Zhou, Santiago Bock, Bruce Childers, Rami Melhem, and Daniel Mosse, "Increasing PCM main memory lifetime," 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010), pp. 914-919, 2010.
13 Guangshan Duan and Shuai WangG, "Exploiting narrow-width values for improving non-volatile cache lifetime," 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), pp. 1-4, 2014.