• Title/Summary/Keyword: Library and Information Sciences

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Design and Implementation of Produce Farming Field-Oriented Smart Pest Information Retrieval System based on Mobile for u-Farm (u-Farm을 위한 모바일 기반의 농작물 재배 현장 중심형 스마트 병해충 정보검색 시스템 설계 및 구현)

  • Kang, Ju-Hee;Jung, Se-Hoon;Nor, Sun-Sik;So, Won-Ho;Sim, Chun-Bo
    • The Journal of the Korea institute of electronic communication sciences
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    • v.10 no.10
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    • pp.1145-1156
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    • 2015
  • There is a shortage of mobile application systems readily applicable to the field of crop cultivation in relation to diseases and insect pests directly connected to the quality of crops. Most of system have been devoted to diseases and insect pests that would offer full predictions and basic information about diseases and insect pests currently. But for lack of the instant diagnostic functions seriously and the field of crop cultivation, we design and implement a crop cultivation field-oriented smart diseases and insect pests information retrieval system based on mobile for u-Farm. The proposed system had such advantages as providing information about diseases and insect pests in the field of crop cultivation and allowing the users to check the information with their smart-phones real-time based on the Lucene, a search library useful for the specialized analysis of images, and JSON data structure. And it was designed based on object-oriented modeling to increase its expandability and reusability. It was capable of search based on such image characteristic information as colors as well as the meta-information of crops and meta-information-based texts. The system was full of great merits including the implementation of u-Farm, the real-time check, and management of crop yields and diseases and insect pests by both the farmers and cultivation field managers.

Smart Ship Container With M2M Technology (M2M 기술을 이용한 스마트 선박 컨테이너)

  • Sharma, Ronesh;Lee, Seong Ro
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38C no.3
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    • pp.278-287
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    • 2013
  • Modern information technologies continue to provide industries with new and improved methods. With the rapid development of Machine to Machine (M2M) communication, a smart container supply chain management is formed based on high performance sensors, computer vision, Global Positioning System (GPS) satellites, and Globle System for Mobile (GSM) communication. Existing supply chain management has limitation to real time container tracking. This paper focuses on the studies and implementation of real time container chain management with the development of the container identification system and automatic alert system for interrupts and for normal periodical alerts. The concept and methods of smart container modeling are introduced together with the structure explained prior to the implementation of smart container tracking alert system. Firstly, the paper introduces the container code identification and recognition algorithm implemented in visual studio 2010 with Opencv (computer vision library) and Tesseract (OCR engine) for real time operation. Secondly it discusses the current automatic alert system provided for real time container tracking and the limitations of those systems. Finally the paper summarizes the challenges and the possibilities for the future work for real time container tracking solutions with the ubiquitous mobile and satellite network together with the high performance sensors and computer vision. All of those components combine to provide an excellent delivery of supply chain management with outstanding operation and security.

Design of a High-Speed Data Packet Allocation Circuit for Network-on-Chip (NoC 용 고속 데이터 패킷 할당 회로 설계)

  • Kim, Jeonghyun;Lee, Jaesung
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2022.10a
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    • pp.459-461
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    • 2022
  • One of the big differences between Network-on-Chip (NoC) and the existing parallel processing system based on an off-chip network is that data packet routing is performed using a centralized control scheme. In such an environment, the best-effort packet routing problem becomes a real-time assignment problem in which data packet arriving time and processing time is the cost. In this paper, the Hungarian algorithm, a representative computational complexity reduction algorithm for the linear algebraic equation of the allocation problem, is implemented in the form of a hardware accelerator. As a result of logic synthesis using the TSMC 0.18um standard cell library, the area of the circuit designed through case analysis for the cost distribution is reduced by about 16% and the propagation delay of it is reduced by about 52%, compared to the circuit implementing the original operation sequence of the Hungarian algorithm.

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Architecture Design of High Performance H.264 CAVLC Encoder Using Optimized Searching Technique (최적화된 탐색기법을 이용한 고성능 H.264/AVC CAVLC 부호화기 구조 설계 기법)

  • Lee, Yang-Bok;Jung, Hong-Kyun;Kim, Chang-Ho;Myung, Je-Jin;Ryoo, Kwang-Ki
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.10a
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    • pp.431-435
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    • 2011
  • This paper presents optimized searching technique to improve the performance of H.264/AVC. The proposed CAVLC encoder uses forward and backward searching algorithm to compute the parameters. By zero-block skipping technique and pipelined scheduling, the proposed CAVLC encoder can obtain better performance. The experimental result shows that the proposed architecture needs only 66.6 cycles on average for each $16{\times}16$ macroblock encoding. The proposed architecture improves the performance by 13.8% than that of previous designs. The proposed CAVLC encoder was implemented using VerilogHDL and synthesized with Megnachip $0.18{\mu}m$ standard cell library. The synthesis result shows that the gate count is about 15.6K with 125Mhz clock frequency.

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Progress and Prospect of Research on Old Maps in Korea (우리나라 고지도의 연구 동향과 과제)

  • Kim, Ki-Hyuk
    • Journal of the Korean association of regional geographers
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    • v.13 no.3
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    • pp.301-320
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    • 2007
  • In Korean academic societies, old maps has not yet been properly investigated in terms of their genealogy, classification, detailed place names, historical backgrounds and the other aspects. With publication of the bibliographies and papers on old maps reserved in museum and library, the scope of research enlarged gradually its scope from 1970s. In 1980s, with the development of theoretical geography, scientific analysis were applied to investigate the projection method of Daedongyeo-jido. The 1990s proved a prominent decade for researches. The photo-copies of old maps enabled researchers to investigate the in-depth comparative study. The more important thing is that old maps became to be powerful instrument in the research of historical geography, such as territorial disputes and marine name(東海). And county old maps compiled by region became to be regional-cultural contents of local areas. Important issues in old map research in Korean academic societies are about Cheonha-do which is unique old world map in Korea, grid-system projection in old county maps and the genealogy of Daedongyeo-jido(manuscript and block print edition). This study shows that bibliography of all old maps preserved in each library and museum should be standardized. This could enable the exchange of information of old maps between institutes. The more important thing is that conciliation of human, social and natural sciences should be applied in the research of old maps.

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Design and Implementation of 8b/10b Encoder/Decoder for Serial ATA (직렬 ATA용 8b/10b 인코더와 디코더 설계 및 구현)

  • Heo Jung-Hwa;Park Nho-Kyung;Park Sang-Bong
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.1A
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    • pp.93-98
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    • 2004
  • Serial ATA interface Is inexpensive comparatively and performance is superior. So it is suitable technology in demand that now require data transmission and throughput of high speed. This paper describes a design and implementation of Serial ATA Link layer about error detection and 8b/10b encoder/decoder for DC balance in frequency 150MHz. The 8b/10b Encoder is partitioned into a 5b/6b plus a 3b/4b coder. The logical model of the block is described by using Verilog HDL at register transistor level and the verified HDL is synthesized using standard cell libraries. And it is fabricated with $0.35{\mu}m$ Standard CMOS Cell library and the chip size is about $1500{\mu}m\;*\;1500{\mu}m$. The function of this chip has been verified and tested using testboard with FPGA equipment and IDEC ATS2 test equipment. It is used to frequency of 100MHz in verification processes and supply voltage 3.3V. The result of testing is well on the system clock 100MHz. The designed and verified each blocks may be used IP in the field of high speed serial data communication.

Design of Multimode Block Cryptosystem for Network Security (네트워크 보안을 위한 다중모드 블록암호시스템의 설계)

  • 서영호;박성호;최성수;정용진;김동욱
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.11C
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    • pp.1077-1087
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    • 2003
  • In this paper, we proposed an architecture of a cryptosystem with various operating modes for the network security and implemented in hardware using the ASIC library. For configuring a cryptosystem, the standard block ciphers such as AES, SEED and 3DES were included. And the implemented cryptosystem can encrypt and decrypt the data in real time through the wired/wireless network with the minimum latency time (minimum 64 clocks, maximum 256 clocks). It can support CTR mode which is widely used recently as well as the conventional block cipher modes such as ECB, CBC and OFB, and operates in the multi-bit mode (64, 128, 192, and 256 bits). The implemented hardware has the expansion possibility for the other algorithms according to the network security protocol such as IPsec and the included ciphering blocks can be operated simultaneously. The self-ciphering mode and various ciphering mode can be supported by the hardware sharing and the programmable data-path. The global operation is programmed by the serial communication port and the operation is decided by the control signals decoded from the instruction by the host. The designed hardware using VHDL was synthesized with Hynix 0.25$\mu\textrm{m}$ CMOS technology and it used the about 100,000 gates. Also we could assure the stable operation in the timing simulation over 100㎒ using NC-verilog.

An Adaptive Decision-Feedback Equalizer Architecture using RB Complex-Number Filter and chip-set design (RB 복소수 필터를 이용한 적응 결정귀환 등화기 구조 및 칩셋 설계)

  • Kim, Ho Ha;An, Byeong Gyu;Sin, Gyeong Uk
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.12A
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    • pp.2015-2024
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    • 1999
  • Presented in this paper are a new complex-umber filter architecture, which is suitable for an efficient implementation of baseband signal processing of digital communication systems, and a chip-set design of adaptive decision-feedback equalizer (ADFE) employing the proposed structure. The basic concept behind the approach proposed in this paper is to apply redundant binary (RB) arithmetic instead of conventional 2’s complement arithmetic in order to achieve an efficient realization of complex-number multiplication and accumulation. With the proposed way, an N-tap complex-number filter can be realized using 2N RB multipliers and 2N-2 RB adders, and each filter tap has its critical delay of $T_{m.RB}+T_{a.RB}$ (where $T_{m.RB}, T_{a.RB}$are delays of a RB multiplier and a RB adder, respectively), making the filter structure simple, as well as resulting in enhanced speed by means of reduced arithmetic operations. To demonstrate the proposed idea, a prototype ADFE chip-set, FFEM (Feed-Forward Equalizer Module) and DFEM (Decision-Feedback Equalizer Module) that can be cascaded to implement longer filter taps, has been designed. Each module is composed of two complex-number filter taps with their LMS coefficient update circuits, and contains about 26,000 gates. The chip-set was modeled and verified using COSSAP and VHDL, and synthesized using 0.8- μm SOG (Sea-Of-Gate) cell library.

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Research Trends in The Journal of Daesoon Academy of Sciences : 『The Journal of Daesoon』 Vol.1-Vol.25 (1996~2015) (『대순사상논총』의 연구 동향에 관한 연구- 『대순사상논총』 1집-25집(1996~2015) -)

  • Chang, In-ho
    • Journal of the Daesoon Academy of Sciences
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    • v.27
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    • pp.201-243
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    • 2016
  • This paper analyzes the research trends from 358 scholarly articles published in the Journal of Daesoon Academy of Sciences from the first published journal in 1996 to the most recent journal published on the 25th of 2015 and proposes ideas for improvement. First of all, "The Journal of Daesoon Academy of Sciences" does not meet the standards required by the National Research Foundation, falling short of the most important conditions for the registration such as the periodicity and punctuality expected from academic journals. Furthermore, in terms of the Bibliometrical analysis, the number of articles published by the journal is decreasing and the consistency, with regards to rules and principles regulating publication details and bibliography formats, is nonexistent. Although various authors seemed to be meeting these criteria on the surface, the ratio of co-authored articles is too small. Securing researchers specializing in Daesoon Thought for expanding the size of the journal is important, but it is also important to diversify the research topics through exchanging ideas among researchers from various organizations. Here are some ideas for the improvement of the Journal of Daesoon Academy of Sciences: First, in order to meet the standards for punctuality and periodicity, it would be best to publish the journal twice a year with 12 to 15 articles. Second, the journal must become searchable through the creation of a database. Third, the key words and abstracts of articles must be written in Korean and English to facilitate the sharing of articles among researchers. Fourth, the journal must have a diverse and outstanding editorial board which takes into account the geographical situations of its board members. Fifth, the Journal must include articles on relevant topics that reflect the core topics of the Daesoon Thought and other studies. Sixth, articles must have a front page that contains bibliographical items to convey information to the reader. Seventh, it is essential that the journal have a clear publication date detailing the year, month, and day as well as a standard numbering scheme (i.e, Vol. and no).

MPEG-H 3D Audio Decoder Structure and Complexity Analysis (MPEG-H 3D 오디오 표준 복호화기 구조 및 연산량 분석)

  • Moon, Hyeongi;Park, Young-cheol;Lee, Yong Ju;Whang, Young-soo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.42 no.2
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    • pp.432-443
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    • 2017
  • The primary goal of the MPEG-H 3D Audio standard is to provide immersive audio environments for high-resolution broadcasting services such as UHDTV. This standard incorporates a wide range of technologies such as encoding/decoding technology for multi-channel/object/scene-based signal, rendering technology for providing 3D audio in various playback environments, and post-processing technology. The reference software decoder of this standard is a structure combining several modules and can operate in various modes. Each module is composed of independent executable files and executed sequentially, real time decoding is impossible. In this paper, we make DLL library of the core decoder, format converter, object renderer, and binaural renderer of the standard and integrate them to enable frame-based decoding. In addition, by measuring the computation complexity of each mode of the MPEG-H 3D-Audio decoder, this paper also provides a reference for selecting the appropriate decoding mode for various hardware platforms. As a result of the computational complexity measurement, the low complexity profiles included in Korean broadcasting standard has a computation complexity of 2.8 times to 12.4 times that of the QMF synthesis operation in case of rendering as a channel signals, and it has a computation complexity of 4.1 times to 15.3 times of the QMF synthesis operation in case of rendering as a binaural signals.