• Title/Summary/Keyword: Large-grain Silicon

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Electrical characteristics of Large-grain TFT induced with Ni (Ni로 유도된 Large-grain TFT의 전기적 특성)

  • Lee, Jin-Hyuk;Lee, Won-Baek;Yi, Jun-Sin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.06a
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    • pp.367-367
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    • 2010
  • Electrical characteristics of Large-grain silicon with Ni-induced crystallization which gate insulator is made of 80 nm $SiO_2$ and 20 nm SiNx was fabricated and measured with different channel widths, channel length fixed $10{\mu}m$. Focusing on the changes of channel widths from $4{\mu}m$ to $40{\mu}m$. Field-effect mobility decreased from 111.30 to $94.10\;cm^2/V_s$ when the channel widths increased. Still threshold voltage was almost similar with -1.06V.

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Directional Effect of Applied Pressure during the Sintering on the Microstructures and Fracture Toughness of Heat-treated Silicon Nitride Ceramics (소결시의 가압방식이 열처리 후 질화규소의 미세조직과 파괴인성에 미치는 영향)

  • 이상훈;박희동;이재도
    • Journal of the Korean Ceramic Society
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    • v.32 no.6
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    • pp.653-658
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    • 1995
  • Directional effect of applied pressure during sintering on the microstructure and fracture toughness of the heat-treated silicon nitride ceramics has been investigated. The specimens with a composition of 92Si3N4-8Y2O3(in wt%) were sintered at 172$0^{\circ}C$ by a hot press (HP ) and a hot isostatic press (HIP) and heat-treated for grain growth at 1800~20$0^{\circ}C$. The fracture toughness of the HP samples increased with the grain size while the fracture toughness of the HIP treated samples remained the same even though the grain growth occurred. This discrepancy was explained by a bimodal grain size distribution and large aspect ratio of the HPed samples and a monomodal grain size distributjion and samll aspect ratio of the HIP treated samples.

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A Study on the Variation of Surface Roughness of a-Si According to Recrystallization (비정질 실리콘의 재결정화에 따른 표면기복의 변화에 관한 연구)

  • Park, Jae-Hong;Chung, Chong-Won;Kim, Chul-Ju
    • Proceedings of the KIEE Conference
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    • 1995.07c
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    • pp.1181-1183
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    • 1995
  • In this study, we observed the surface morphology of amorphous silicon annealed at $700{\sim}1000^{\circ}C$ for recrystallization. In case of $700{\sim}800^{\circ}C$ annealing, deposited amorphous silicon have the saturated XRD intensity and decreased surface roughness after annealing for 3 hours. It is thought that surface roughness of amorphous silicon increases because of contributions caused by atomic rearrangement of surface, for instance, surface stress etc., in the course of recrystallinzation and decrease because of the relaxation of stress by annealing in reaching completion of recrystallization. In case of $1000^{\circ}C$ annealing, the effect of grain size on deposited silicon is more effective than that of surface roughness. These results show that small grain silicon has the stronger dependence on surface roughness than large grain one.

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Effect of Seeding on Microstructural Development of Silicon Nitride Ceramics (질화규소 세라믹스의 미세조직 형성에 미치는 Seed 첨가의 영향)

  • 이창주
    • Journal of Powder Materials
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    • v.5 no.2
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    • pp.133-138
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    • 1998
  • The effect of $\beta$-$Si_3N_4$ seeding on microstructural development of silicon nitride based materials has been investigated. In particular, to observe more distinctly the abnormal grain growth in pressureless sintering, fine $\alpha$-$Si_3N_4$(mean particle size: 0.26 ${\mu}m$) powder classified by sedimentation method was used. It was possible to prepare silicon nitride with abnormally grown grains under low nitrogen pressure of 1 atm thanks to the heterogeneous nucleation on $Si_3N_4$ seed particles. The size and morphology of silicon nitride grains were strongly influenced by the presence of $\beta$-$Si_3N_4$ seed and overall chemical composition. For specimens with initially low $\beta$-content, the large grains grew without a significant impingement by other large grains. On the contrary, for specimens with initially high $\beta$-content, steric hindrance was effective. The resulting microstructure was less inhomogeneous and characterized by unimodal grain size distribution.

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Effects of Neutral Particle Beam on Nano-Crystalline Silicon Thin Film Deposited by Using Neutral Beam Assisted Chemical Vapor Deposition at Room Temperature

  • Lee, Dong-Hyeok;Jang, Jin-Nyoung;So, Hyun-Wook;Yoo, Suk-Jae;Lee, Bon-Ju;Hong, Mun-Pyo
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.254-255
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    • 2012
  • Interest in nano-crystalline silicon (nc-Si) thin films has been growing because of their favorable processing conditions for certain electronic devices. In particular, there has been an increase in the use of nc-Si thin films in photovoltaics for large solar cell panels and in thin film transistors for large flat panel displays. One of the most important material properties for these device applications is the macroscopic charge-carrier mobility. Hydrogenated amorphous silicon (a-Si:H) or nc-Si is a basic material in thin film transistors (TFTs). However, a-Si:H based devices have low carrier mobility and bias instability due to their metastable properties. The large number of trap sites and incomplete hydrogen passivation of a-Si:H film produce limited carrier transport. The basic electrical properties, including the carrier mobility and stability, of nc-Si TFTs might be superior to those of a-Si:H thin film. However, typical nc-Si thin films tend to have mobilities similar to a-Si films, although changes in the processing conditions can enhance the mobility. In polycrystalline silicon (poly-Si) thin films, the performance of the devices is strongly influenced by the boundaries between neighboring crystalline grains. These grain boundaries limit the conductance of macroscopic regions comprised of multiple grains. In much of the work on poly-Si thin films, it was shown that the performance of TFTs was largely determined by the number and location of the grain boundaries within the channel. Hence, efforts were made to reduce the total number of grain boundaries by increasing the average grain size. However, even a small number of grain boundaries can significantly reduce the macroscopic charge carrier mobility. The nano-crystalline or polymorphous-Si development for TFT and solar cells have been employed to compensate for disadvantage inherent to a-Si and micro-crystalline silicon (${\mu}$-Si). Recently, a novel process for deposition of nano-crystralline silicon (nc-Si) thin films at room temperature was developed using neutral beam assisted chemical vapor deposition (NBaCVD) with a neutral particle beam (NPB) source, which controls the energy of incident neutral particles in the range of 1~300 eV in order to enhance the atomic activation and crystalline of thin films at room temperature. In previous our experiments, we verified favorable properties of nc-Si thin films for certain electronic devices. During the formation of the nc-Si thin films by the NBaCVD with various process conditions, NPB energy directly controlled by the reflector bias and effectively increased crystal fraction (~80%) by uniformly distributed nc grains with 3~10 nm size. The more resent work on nc-Si thin film transistors (TFT) was done. We identified the performance of nc-Si TFT active channeal layers. The dependence of the performance of nc-Si TFT on the primary process parameters is explored. Raman, FT-IR and transmission electron microscope (TEM) were used to study the microstructures and the crystalline volume fraction of nc-Si films. The electric properties were investigated on Cr/SiO2/nc-Si metal-oxide-semiconductor (MOS) capacitors.

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Effect of Large $\alpha$-Silicon Carbide Seed Grains on Microstructure and Fracture Toughness of Pressureless-Sintered $\alpha$-Silicon Carbide

  • Young-Wook Kim;Kyeong Sik Cho;June-Gunn Lee
    • The Korean Journal of Ceramics
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    • v.2 no.1
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    • pp.39-42
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    • 1996
  • ${\alpha}-SiC$ powder with or without the addition of 0.1 wt% of large ${\alpha}-SiC$ partices(seeds) was pressureless-sintered at $1950^{\circ}C$ for 0.5, 2, and 4 h using $Y_3Al_5 O_{12}$ (yttrium aluminum garnet, YAG) as a sintering aid. The materials without seeds had an equiaxed grain struture. In contrast, the materials with seeds sintered for 2 and 4 h had a duplex microstructure with large elongated grains and amall equiaxed grains. Addition of large ${\alpha}-SiC$ seeds into ${\alpha}-SiC$ accelerated the grain growth of some ${\alpha}-SiC$ grains during sintering and resulted in the increased fracture toughness of the sintered materials. The fracture toughnesses of materials with or without seeds sintered for 4 h were 6.6 and $5.2 MPa \;m^{12}$, respectively.

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Friction and Wear of Pressureless Sintered Ti(C,N)-WC Ceramics

  • Park, Dong-Soo;Yun, Shin-Sang;Han, Byoung-Dong;Kim, Hai-Doo
    • Proceedings of the Korean Society of Tribologists and Lubrication Engineers Conference
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    • 2002.10b
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    • pp.211-212
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    • 2002
  • Friction and wear of pressureless sintered Ti(C,N)-WC ceramics were studied using a ball-on-reciprocating flat apparatus in open air. The silicon nitride ball and the cemented carbide (WC-Co) ball were used against the Ti(C,N)-WC plate samples. The friction coefficients of the Ti(C,N)-WC samples against the silicon nitride ball and the cemented carbide ball were about 0.57 and 0.3, respectively. The wear coefficient of the sample without WC addition was 5 times as large as that of the sample with 10 mole % WC addition when tested against the silicon nitride ball under 98 N. The higher wear coefficient of Ti(C,N)-0WC was explained in part by larger grain size. Wear occurred mainly by grain dislodgment after intergranular cracking mainly caused by the accumulated stress within the grains.

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The Effects of Nanocrystalline Silicon Thin Film Thickness on Top Gate Nanocrystalline Silicon Thin Film Transistor Fabricated at 180℃

  • Kang, Dong-Won;Park, Joong-Hyun;Han, Sang-Myeon;Han, Min-Koo
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.8 no.2
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    • pp.111-114
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    • 2008
  • We studied the influence of nanocrystalline silicon (nc-Si) thin film thickness on top gate nc-Si thin film transistor (TFT) fabricated at $180^{\circ}C$. The nc-Si thickness affects the characteristics of nc-Si TFT due to the nc-Si growth similar to a columnar. As the thickness of nc-Si increases from 40 nm to 200 nm, the grain size was increased from 20 nm to 40 nm. Having a large grain size, the thick nc-Si TFT surpasses the thin nc-Si TFT in terms of electrical characteristics such as field effect mobility. The channel resistance was decreased due to growth of the grain. We obtained the experimental results that the field effect mobility of the fabricated devices of which nc-Si thickness is 60, 90 and 130 nm are 26, 77 and $119\;cm^2/Vsec$, respectively. The leakage current, however, is increased from $7.2{\times}10^{-10}$ to $1.9{\times}10^{-8}\;A$ at $V_{GS}=-4.4\;V$ when the nc-Si thickness increases. It is originated from the decrease of the channel resistance.

Large grain을 가지는 LTPS TFT의 Gate bias stress에 따른 소자의 특성 변화 분석

  • Yu, Gyeong-Yeol;Lee, Won-Baek;Jeong, U-Won;Park, Seung-Man;Lee, Jun-Sin
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.429-429
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    • 2010
  • TFT 제조 방법 중 LTPS (Low Temperature Polycrystalline Silicon)는 저온과 저비용 등의 이점으로 인하여 flat panel display 제작에 널리 사용된다. 이동도와 전류 점멸비 등에서 이점을 가지는 ELA(Excimer Laser Annealing)가 널리 사용되고 있지만, 이 방법은 uniformity 등의 문제점을 가지고 있다. 이를 극복하기 위한 방법으로 MICC(Metal Induced Capping Crystallization)이 사용되고 있다. 이 방법은 $SiN_x$, $SiO_2$, SiON등의 capping layer를 diffusion barrier로 위치시키고, Ni 등의 금속을 capping layer에 도핑 한 뒤, 다시 한번 열처리를 통하여 a-Si에 Ni을 확산시키킨다. a-Si 층에 도달한 Ni들이 seed로 작용하여 Grain size가 매우 큰 film을 제작할 수 있다. 채널의 grain size가 클 경우 grain boundary에 의한 캐리어 scattering을 줄일 수 있기 때문에 MIC 방법을 사용하였음에도 ELA에 버금가는 소자의 성능과 안정성을 얻을 수있었다. 본 연구에서는 large grain TFT의 Gate bias stress에 따른 소자의 안정성 측정 및 분석에 목표를 두었다.

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