• Title/Summary/Keyword: LVDS (Low Voltage Differential Signaling)

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Multiple LCD System Development of daisy-chain Method using LVDS (LVDS를 이용한 daisy-chain 방식의 다중 LCD 시스템 개발)

  • Kim, Jae-Chul
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.12
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    • pp.2747-2754
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    • 2012
  • This thesis explains the development of multiple LCD system with the additional function to maximize the utilization of PC contents. The newly developed system is composed of host LCD and slave LCD. Host LCD decodes and outputs the image and voice of NTSC, PAL, SECAM signals. It also converts the decoded signals into LVDS signals before transmitting them to slave LCD stage. In addition, the installation of CF Memory and USB Memory helps display multi-media data. Unlike the host LCD, since not including the tuner and memory part, the slave LCD can't receive TV signals and play video signals. It only has the function to receive LVDS image signals and display on a LCD panel. This newly developed multi-LCD system has competitiveness in various aspects. With its simple structure, the failure rate, price and display power are relatively low due to its simplification of the control part. It has price and functional competitiveness as the product whose host LCD can control the entire slave LCD in terms of channel, volume, and video output.

Design and Implementation of MDDI Protocol for Mobile System (모바일 시스템을 위한 MDDI 프로토콜 설계 및 구현)

  • Kim, Jong-Moon;Lee, Byung-Kwon;Jung, Hoe-Kyung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.5
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    • pp.1089-1094
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    • 2013
  • In this study, we propose how th implement a MDDI(Mobile Display Digital Interface) protocol packet generation method in software. MDDI protocol is widely used in mobile display device. MDDI protocol packets are generated by software within micro processor. This method needs the minimum hardware configuration. In order to implementation of this method, we design a hardware platform with a high performance microprocessor and a FPGA. The packets generated by software within microprocessor are converted into LVDS signals, and transmitted by hardware within FPGA. This study suggests the benefits of the way how software can easily create a variety of packet. But, this proposed method takes more time in packet transmission compared to the traditional method. This weakness remains as a future challenge, which can be soon improved.

Low Power Dual-Level LVDS Technique using Current Source Switching (전류원 스위칭에 의한 저전력 듀얼레벨 차동신호 전송(DLVDS) 기법)

  • Kim, Ki-Sun;Kim, Doo-Hwan;Cho, Kyoung-Rok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.1
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    • pp.59-67
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    • 2007
  • This paper presents a low power dual-level low voltage differential signaling (DLVDS) technique using current source switching for LCD driver ICs in portable products. The transmitter makes dual level signal that has two different level signal 400mVpp and 250mVpp while keeping the advantages of LVDS. The decoding circuit recovers the primary signal from DLVDS. The low power DLVDS is implemented using a $0.25{\mu}m$ CMOS process under 2.5V supply. The proposed circuit shows 800Mbps/2-line data rate and 9mW, 11.5mW power consumptions in transmitter and receiver, respectively. The proposed DLVDS scheme reduce power consumption dramatically compare with conventional one.

53.1 Low power and low EMI display technologies based on the total image systematic approach

  • Okumura, Haruhiko;Baba, Masahiro;Takagi, Ayako;Sasaki, Hisashi;Matsuba, Mitsunori
    • 한국정보디스플레이학회:학술대회논문집
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    • 2009.10a
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    • pp.1081-1085
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    • 2009
  • We have already developed EMI reducing techniques using lossless compression by vertically differential EMI suppression method (VDE[1]). It applies lossless modulo reduction and data bit mapping optimization for low voltage differential signaling (LVDS) transmission lines, that reduces the probability of transient bit and EMI by 12 dB [6][7]. We also improved and optimized the VDE for low power LCD interface. With this modified VDE algorithm[8], the developed FPGA was measured the reduction of the power consumption of LCD circuit by more than 15 % compared to the conventional methods in the case of 14-in LCD with SXGA resolution. The VDE algorithm is based on the total image systematic approach. In the VDE method, the present image signals are subtracted for the 1H delayed image signals and transferred to a column driver through a PCB. As the vertical correlations for image signals are very high, we expected that most of the vertically subtracted image signals remain 0 level and transient cycles become very long. As a result, the power consumption and EMI are extremely reduced for the transferred image signals on a PCB. In this paper, we discussed our proposed method by emphasizing the fact that systematic approach are important based on not only display point of view but also total system point of view.

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Implementation of a Client Display Interface for Mobile Devices via Serial Transfer (모바일 직렬 전송방식의 클라이언트 디스플레이 인터페이스 구현)

  • Park Sang-Woo;Lee Yong-Hwan
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2006.05a
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    • pp.522-525
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    • 2006
  • Recently, mobile devices support multi-functions such as 3D game, wireless internet, moving pictures, DMB, GPS, and PMP. Bigger size of display device is indispensable to support these functions and higher speed of the interface is needed. However, conventional parallel interfaces between processor and display nodule are not competent enough for that high speed transfers. High-speed serial interface is beginning to appear as an alternative for parallel interface. The advantages of the serial interface are high bandwidth, small number of interconnections, low-power consumption, and good quality of electro-magnetic interference. In this paper, we implement serial interface and use it for a display module. LVDS is used for PHY layer and a defined packet is used for link layer. The feature of the implemented serial interface is the reduced number of interconnections with enough bandwidth.

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Design of Low-Power and High-Speed Receiver for a Mobile Display Digital Interface (모바일 디스플레이 디지털 인터페이스용 저전력 고속 수신기 회로의 설계)

  • Lee, Cheon-Hyo;Kim, Jeong-Hoon;Lee, Jae-Hyung;Jin, Liyan;Yin, Yong-Hu;Jang, Ji-Hye;Kang, Min-Cheol;Li, Long-Zhen;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.7
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    • pp.1379-1385
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    • 2009
  • We propose a low-power and high-speed client receiver for a mobile display digital interface (MDDI) newly in this paper. The low-power receiver is designed such that bias currents, sink and source currents, are insensitive to variations of power supply, process, temperature, and common-mode input voltage (VCM) and is able to operate at a rate of 450Mbps or above under the conditions of a power supply range of 3.0 to 3.6Vand a temperature range of -40 to 85$^{\circ}$C. And it is confirmed by a simulation result that the current dissipation is less than 500${\mu}$A. A test chip is manufactured with the Magna chip 0.35${\mu}$m CMOS process. When a test was done, the data receiver and data recovery circuits are functioning normally.