• The Journal of the Korea institute of electronic communication sciences
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• v.8 no.2
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• pp.207-212
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• 2013

A novel pixel circuit that uses only n-type low-temperature polycrystalline silicon (poly-Si) thin-film transistors (LTPS-TFTs) to compensate the threshold voltage variation of a OLED driving TFT is proposed. The proposed 6T1C pixel circuit consists of 5 switching TFTs, 1 OLED driving TFT and 1 capacitor. When the threshold voltage of driving TFT varies by ${\pm}0.33$ V, Smartspice simulation results show that the maximum error rate of OLED current is 7.05 % and the error rate of anode voltage of OLED is 0.07 % at Vdata = 5.75 V. Thus, the proposed 6T1C pixel circuit can realize uniform output current with high immunity to the threshold voltage variation of poly-Si TFT.

• Journal of the Korean institute of surface engineering
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• v.43 no.1
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• pp.7-11
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• 2010

Solid phase crystallization (SPC) is a simple method in producing a polycrystalline phase by annealing amorphous silicon (a-Si) in a furnace environment. Main motivation of the crystallization technique is to fabricate low temperature polycrystalline silicon thin film transistors (LTPS-TFTs) on a thermally susceptible glass substrate. Studies on SPC have been naturally focused to the low temperature regime. Recently, fabrication of polycrystalline silicon (poly-Si) TFT circuits from a high temperature polycrystalline silicon process on steel foil substrates was reported. Solid phase crystallization of a-Si films proceeds by nucleation and growth. After nucleation polycrystalline phase is propagated via twin mediated growth mechanism. Elliptically shaped grains, therefore, contain intra-granular defects such as micro-twins. Both the intra-granular and the inter-granular defects reflect the crystallinity of SPC poly-Si. Crystallinity and SPC kinetics of high temperatures were compared to those of low temperatures using Raman analysis newly proposed in this study.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.153-156
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• 2004

A newly developed flexible active-matrix (AM-) electrophoretic display (EPD) is reported. The AM-EPD features: (1) low-temperature polycrystalline silicon (LTPS) thin film transistor (TFT) technology, (2) fully integrated scan- and data-drivers, (3) flexibility and light-weight realized by transferring the whole circuits onto a plastic substrate using $SUFTLA^{TM}$ (Surface Free Technology by Laser Annealing/Ablation) process. A large storage capacitor is formed in each pixel so that driving electric field can be kept sufficiently strong during a writing period Two-phase driving scheme, a reset-phase which erases a previous image and a writing-phase for writing a new image, was chosen to cope with EPD's high driving voltage. The flexible AM-EPD has been successfully operated with a driving voltage of 8.5 V.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.911-913
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• 2008

In this work, nonvolatile memory (NVM) devices for system on panel of flat panel display (FPD) were fabricated using low temperature polycrystalline silicon (LTPS) thin film transistor (TFT) technology with an oxide-nitride-oxynitride (ONOn) stack structure on glass. The results demonstrate that the NVM devices fabricated using the ONOn stack structure on glass have suitable switching characteristics for data storage with a low operating voltage, a threshold voltage window of more than 1.8 V between the programming and erasing (P/E) states after 10 years and its initial threshold voltage window (${\Delta}V_{TH}$) after $10^5$ P/E cycles.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.109-112
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• 2008

The grain size of JIC poly-Si can be varied from few tens of nanometers to the one having the larger grain size exceeding that of excimer laser crystallized (ELC) poly-Si according transmission electron microscopy. JIC poly-Si exhibits an excellent uniformity with regards to the grain size. We report here the blanket crystallization of the large area using the $2^{nd}$ generation glass substrate.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.56-57
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• 2003

Sequential lateral solidification has recently become an option for manufacturing LTPS TFT LCDs owing to the availability of production equipment. Compared to the currently established ELA crystallization method, it is characterized by its low running costs and the high quality microstructures that can be obtained. In this presentation, we will review the production-related developments as well as elaborate on recent research activities that deal with a number of crystallization schemes that can be beneficial for future active-matrix display products.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.626-629
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• 2003

In order to achieve high-resolution and large-size displays, inspection technology is necessary and important. It is a powerful utility for process and yield improvement for the high valued panel realization. We indicated the challenge of advanced panel manufacturing on inspection ability and throughput. We also investigated the method to judge laser-crystallizing energy by inspection technology. Finally, the total defect number and critical killer defects were classified and discussed in this work.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.149-152
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• 2003

Soruce/drain (or, LDD) formation technology is critical to device reliability especially in the case of short channel LTPS-TFT devices. Ion shower doping with a main ion source of $P_2H_x$ was conducted on ELA Poly-Si. We report the effects of annealing methods on dopant activation and damage recovery in ion-shower doped poly-Si.

• 한국정보디스플레이학회:학술대회논문집
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• 2002.08a
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• pp.325-328
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• 2002

We developed a high performance 2.2" active matrix OLED display for IMT-2000 mobile phone. Scan and Data driver circuits were integrated on the glass substrate, using low temperature poly-Si(LTPS) TFT CMOS technology. High efficiency EL materials were employed to the panel for low power consumption. Peak luminescence of the panel was higher than 250cd/$m^2$ with power consumption of 200mW.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07a
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• pp.665-667
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• 2005

VIATRON TECHNOLOGIES has developed FE-RTP system that enables LTPS LCD and AMOLED manufacturers to produce poly-Si films at low cost, high throughput, and high yield. The system employs sequential heat treatment methods using temperature control and rapid thermal processor modules. The temperature control modules provide exceptionally uniform heating and cooling of the glass substrates to within ${\pm}2^a\;C$. The rapid thermal process that combines heating with field induction accelerates the treatment rates. The new FE-RTP system can process $730{\times}920mm$ glass substrates as thin as 0.4 mm. The uniform nature of poly-Si films produced by FE-RTP resulted in AMOLED panels with no laser-Muras. Furthermore, FE-RTP system also showed superior performances in other heat treatment processes involved in poly-Si TFT fabrications, such as dopant activation, gate oxide densification, hydrogenation, and pre-compaction.