• JSTS:Journal of Semiconductor Technology and Science
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• v.3 no.2
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• pp.89-95
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• 2003

In this paper, we have designed and fabricated high conversion gain Q-band active sub-harmonic mixers for a receiver of millimeter wave wireless communication systems. The fabricated active sub-harmonic mixer uses 2nd harmonic signals of a low local oscillator (LO) frequency. The fabricated mixer was successfully integrated by using $0.1{\;}\mu\textrm{m}$GaAs pseudomorphic high electron mobility transistors (PHEMTs) and coplanar waveguide (CPW) structures. From the measurement, it shows that maximum conversion gain of 4.8 dB has obtained at a RF frequency of 40 GHz for 10 dBm LO power of 17.5 GHz. Conversion gain from the fabricated sub-harmonic mixer is one of the best reported thus far. And a phase noise of the 2nd harmonic was obtained -90.23 dBc/Hz at 100 kHz offset. The active sub-harmonic mixer also ensure a high degree of isolations, which are -35.8 dB from LO-to-IF and -40.5 dB from LO-to-RF, respectively, at a LO frequency of 17.5 GHz.

• Journal of Advanced Navigation Technology
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• v.9 no.2
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• pp.103-109
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• 2005

This paper presents the design of a broadband hybrid mixer using dual-gate FET topology with a low-pass filter which improves return loss of output to isolate RF and LO signal. The low-pass filter shows the isolation with RF and LO signal of better than 40 dBc from 1.5 GHz to 5.5 GHz. The dual-gate mixer which has been designed by using cascade topology operates when the lower FET is biased in linear region and the upper FET is in saturation region. The input matching circuit has been designed to have conversion gain from 1.5 GHz to 5.5 GHz. The designed mixer with low-pass filter shows the conversion gain of better than 7 dB from 1.5 GHz to 5.5 GHz at the low LO power level of 0 dBm with the fixed IF frequency of 21.4 MHz.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.2
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• pp.239-244
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• 2004

In this paper, we have developed a frequency mixer which can be used as a microwave phase conjugator in the LS band retrodirective antenna system. The mixer as a phase conjugator must have an If signal of which frequency is nearly as high as that of an RF signal, so this fact brings difficulty in the combination of input signals and the design of impedance matching circuit. The circuit configuration is chosen to be of the gate mixer using a pseudomorphic HEMT device. The operating frequencies are 4.00 ㎓, 2.01 ㎓, and 1.99 ㎓ for LO, RF, and IF, respectively. Conversion gain is measured to be 12.5 ㏈ and 1 ㏈ compression point -34 ㏈m at the LO power of -7 ㏈m. The mixer fabricated in this research is the single-ended type, where RF leakage signal appears inevitably at the If port because RF and If frequencies are almost the same. The circuit topology suggested here can be applied directly to the design of balanced-type mixers and phase conjugators.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.5C
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• pp.522-529
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• 2002

MMIC circuits in whole receiver system was fabricated based on GaAs pHEMT technology. And a V-band downconverter module was fabricated by integrating these circuits. The downconverter module consists of a LO drive power amplifier which generates 24dBm output power, a low noise amplifier(LNA) which shows 20 dB small signal gain, an active parallel feedback oscillator which generates 1.6 dBm output power, and a cascode mixer which shows over 6dB conversion gain. The good conversion gain performance of our mixer made no need to attach any IF amplifier which grows conversion gain. Measured results of the complete downconverter show a conversion gain of over 20 dB between 57.5 GHz and 61.7GHz without IF amplifier.

• Journal of Power Electronics
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• v.12 no.3
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• pp.418-428
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• 2012

It is very important to improve the overall efficiency of systems with a source of power that has low-voltage high-current terminal characteristics such as fuel cells. A resonant converter is required for high efficiency systems. However, the peak value of the switches current is large in a resonant converter. This peak current requires a large number of switches and results in system failures. In this paper, an analysis and experiments of a resonant isolation push-pull converter are performed. A switching loss analysis is performed in order to compare losses between a resonant push pull converter and a hard switching push-pull converter. Specially, the conduction loss is studied based on the ratio between the resonant frequency and the switching frequency. In addition, a method for improving the efficiency is implemented with conventional HF insolation converters.

• Journal of electromagnetic engineering and science
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• v.2 no.2
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• pp.117-123
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• 2002

This paper describes the design for the resistive FET mixer with low If for the 4-Ch DBF(Digital Beam Forming) receiver This DBF receiver based on the direct conversion method is generally suitable for high-speed wireless mobile communications. A radio frequency(RF), a local oscillator(LO) and an intermediate frequency(If) considered in this research are 2.09 GHz, 2.08 CHz and 10 MHz, respectively. This mixer is composed of band pass filter, a low pass filter and a DC bias circuit. Super low noise HJ FET of NE3210S01 is considered in design. The RE input power, LO input power and Vcs are used -10 dBm, 6 dBm and -0.4 V, respectively. In the 4-Ch resistive FET mixer, the measured If and harmonic components of 10 MHe, 20 MHz and 2.087 CHz are about -19.2 dBm, -66 dBm and -48 dBm, respectively The If output power observed at each channel of 10 MHz is about -19.2 dBm and it is higher 28.8 dBm than the maximum harmonic component of 2.087 CHz. Each If output spectrum of the 4-Ch is observed almost same value and it shows a good agreement with the prediction.

• Journal of Communications and Networks
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• v.17 no.6
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• pp.647-655
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• 2015

Low-power and lossy networks (LLNs) comprised of thousands of embedded networking devices can be used in a variety of applications, such as smart grid automated metering infrastructures (AMIs) and wireless sensor networks. Connecting these LLNs to the Internet has even greater potential, leading to the emerging concept of the Internet of Things (IoT). With the goal of integrating LLNs into IoT, the IETF has recently standardized RPL and 6LoWPAN to allow the use of IPv6 on LLNs. Although there already exist several studies on the the performance of RPL and embedded IPv6 stack in LLN, performance measurement and characterization of TCP over RPL in multihop LLNs is yet to be studied. In this article, we present a comprehensive experimental study on the performance of TCP over RPL in an embedded IPv6-based LLN running over a 30-node multihop IEEE 802.15.4 testbed network. Our results and findings are aimed at investigating how embedded TCP interoperates with common Linux TCP and underlying RPL (and vice versa), which furthers our understanding of the performance trade-offs when choosing TCP over RPL in IPv6-based LLNs.

• ETRI Journal
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• v.36 no.6
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• pp.924-930
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• 2014

This paper presents a $0.13{\mu}m$ CMOS 3-level envelope delta-sigma modulation (EDSM) RF signal generator, which synthesizes a 2.6 GHz-centered fully symmetrical 3-level EDSM signal for high-efficiency power amplifier architectures. It consists of an I-Q phase modulator, a Class B wideband buffer, an up-conversion mixer, a D2S, and a Class AB wideband drive amplifier. To preserve fast phase transition in the 3-state envelope level, the wideband buffer has an RLC load and the driver amplifier uses a second-order BPF as its load to provide enough bandwidth. To achieve an accurate 3-state envelope level in the up-mixer output, the LO bias level is optimized. The I-Q phase modulator adopts a modified quadrature passive mixer topology and mitigates the I-Q crosstalk problem using a 50% duty cycle in LO clocks. The fabricated chip provides an average output power of -1.5 dBm and an error vector magnitude (EVM) of 3.89% for 3GPP LTE 64 QAM input signals with a channel bandwidth of 10/20 MHz, as well as consuming 60 mW for both channels from a 1.2 V/2.5 V supply voltage.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.1
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• pp.23-28
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• 2009

The general six-port phase correlator is comprised of a Wilkinson power divider and three $90^{\circ}$ hybrid coupler, which has less than 10 % bandwidth. In this paper, the six-port phase correlator using two section power divider has 33 % bandwidth and external matching $90^{\circ}$ hybrid coupler with 15 % bandwidth was designed at the center frequency of 2.5 GHz. The simulation result by ADS2003A indicates that RF port and LO port of proposed six-port phase correlator got wide frequency bandwidth of 14 % for VSWR of 1.5. The fabricated six-port phase correlator has a bandwidth of 12 % similar to the simulation result. The maximum phase discrepancy and insertion loss are $6^{\circ}$ and 2.5 dB over a bandwidth, respectively.

• IEMEK Journal of Embedded Systems and Applications
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• v.14 no.2
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• pp.87-96
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• 2019

Low power issue is one of the most critical problems in the Internet of Things (IoT), which are powered by battery. To solve this problem, various approaches have been presented so far. In this paper, we propose a method to reduce the power consumption by reducing the numbers of accesses into the flash memory consuming a large amount of power for on-chip software execution. Our approach is based on using cooperative logging structure to distribute the sampling overhead in single sensor node to adjacent nodes in case of rare-event applications. The proposed algorithm to identify event occurrence is newly introduced with negative feedback method by observing difference between past data and recent data coming from the sensor. When an event with need of flash access is determined, the proposed approach only allows access to write the sampled data in flash memory. The proposed event detection algorithm (EDA) result in 30% reduction of power consumption compared to the conventional flash write scheme for all cases of event. The sampled data from the sensor is first traced into the random access memory (RAM), and write access to the flash memory is delayed until the page buffer of the on-chip flash memory controller in the micro controller unit (MCU) is full of the numbers of the traced data, thereby reducing the frequency of accessing flash memory. This technique additionally reduces power consumption by 40% compared to flash-write all data. By sharing the sampling information via LoRa channel, the overhead in sampling data is distributed, to reduce the sampling load on each node, so that the 66% reduction of total power consumption is achieved in several IoT edge nodes by removing the sampling operation of duplicated data.