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A High Isolation 4 by 4 MIMO Antenna for LTE Mobile Phones using Coupling Elements

  • Lee, Won-Woo;Yang, Hyung-kyu;Jang, Beakcheol
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.11 no.12
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    • pp.5745-5758
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    • 2017
  • In this paper, we develop a simple but very effective 4 by 4 Multiple-Input Multiple-Output (MIMO) antenna system for mobile phones consisting of different types of antennas to achieve low correlation property at the frequency ranges of 1710 to 2170 MHz, which covers wide LTE service bands, from band 1 to band 4. The proposed antenna system consists of two pair of antennas. Each pair consists of a planar inverted-F antenna (PIFA) and a coupling antenna which has the property of the loop. The use of two different antenna types of IFA and a coupling achieves high isolation. Proposed antenna system occupies relatively small area and positions at the four corners of a printed circuit board. The gap between the two antennas is 4 mm, in order to realize the good isolation performance. To evaluate the performance of our proposed antenna system, we perform various experiments. The proposed antenna shows a wide operating bandwidth greater than 460 MHz with isolation between the feeding ports higher than 17.5-dB. It also shows that the proposed antenna has low Envelop Correlation Coefficient (ECC) values smaller than 0.08 over the all desired frequency tuning ranges.

Morphology of Membranes Formed from Polysulfone/Polyethersulfone/N-methyl-2-pyrrolidone/Water System by Immersion Precipitation

  • Baik, Ki-Jun;Kim, Je-Young;Lee, Jae-Sung;Kim, Sung-Chul;Lee, Hwan-Kwang
    • Macromolecular Research
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    • v.9 no.5
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    • pp.285-291
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    • 2001
  • The polysulfone(PSf)/polyethersulfone(PES) blend membranes were prepared by an immersion precipitation method. N-methyl-2-pyrrolidone(NMP) was used as a solvent and water as a nonsolvent. The composition of the coagulation bath and the dope polymer concentration as well as the blend ratio of two polymers were varied. The membrane morphologies were interpreted on the basis of the phase diagram of the PSf/PES/NMP/water system. As the solvent content in the coagulation bath increased in the single polymer system, the number of macrovoids decreased and the morphology was changed from finger-like to cellular structure. In the given bath condition phase separation occurs earlier for the solutions of PSf/PES blend than for those of single polymer. A horizontally layered structure and horizontal protuberances inside the macrovoid were observed for the membranes formed from PSf/PES blend solutions. This peculiar structure formation can be interpreted by a PSf-rich/PES-rich phase separation followed by a polymer-rich/polymer-lean phase separation during the exchange of solvent and nonsolvent.

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A Simple Model for TCP Loss Recovery Performance over Wireless Networks

  • Kim, Beomjoon;Lee, Jaiyong
    • Journal of Communications and Networks
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    • v.6 no.3
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    • pp.235-244
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    • 2004
  • There have been a lot of approaches to evaluate and predict transmission control protocol (TCP) performance in a numerical way. Especially, under the recent advance in wireless transmission technology, the issue of TCP performance over wireless links has come to surface. It is because TCP responds to all packet losses by invoking congestion control and avoidance algorithms, resulting in degraded end-to-end performance in wireless and lossy systems. By several previous works, although it has been already proved that overall TCP performance is largely dependent on its loss recovery performance, there have been few works to try to analyze TCP loss recovery performance with thoroughness. In this paper, therefore, we focus on analyzing TCP's loss recovery performance and have developed a simple model that facilitates to capture the TCP sender's behaviors during loss recovery period. Based on the developed model, we can derive the conditions that packet losses may be recovered without retransmission timeout (RTO). Especially, we have found that TCP Reno can retransmit three packet losses by fast retransmits in a specific situation. In addition, we have proved that successive three packet losses and more than four packet losses in a window always invoke RTO easily, which is not considered or approximated in the previous works. Through probabilistic works with the conditions derived, the loss recovery performance of TCP Reno can be quantified in terms of the number of packet losses in a window.

Polymerization of Bis(3-trimethylsilyl-2-propynyl)ether and Its Copolymerization with Diethyl Dipropargylmalonate

  • Gal, Yeong-Soon;Jin, Sung-Ho;Lee, Hyung-Jong;Kim, Sung-Hyun;Kim, Won-Chul;Park, Sam-Kwon
    • Macromolecular Research
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    • v.11 no.2
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    • pp.80-86
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    • 2003
  • The polymerization of a cyclopolymerizable disubstituted dipropargyl ether, his(3-trimethylsilyl-2-propynyl)ether (BTPE), was attempted by various transition metal catalysts. The yield for the polymerization of BTPE was generally low, which is possibly due to the steric hindrance of bulky substituents. In general, the catalytic activities of Mo-based catalysts were found to be greater than those of W-based catalysts. The highest yield was obtained when the MoCl$_{5}$,-EtAlCl$_2$(1:2) catalyst system was used. The copolymerization of BTPE and diethyl dipropargylmalonate yielded a random copolymer with conjugated polymer backbone. However the polymers were partially desilylated, depending on the reaction conditions. The thermal and morphological properties of the resulting polymers were also discussed.d.

An Effective Memory Test Algorithm for Detecting NPSFs (이웃 패턴 감응 고장을 위한 효과적인 메모리 테스트 알고리듬)

  • Suh, Il-Seok;Kang, Yong-Seok;Kang, Sung-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.11
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    • pp.44-52
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    • 2002
  • Since memory technology has been developed fast, test complexity and test time have been increased simultaneously. In practice, March algorithms are used widely for detecting various faults. However, March algorithms cannot detect NPSFs(Neighborhood Pattern Sensitive Faults) which must be considered for DRAMs. This paper proposes an effective algorithm for high fault coverage by modifying the conventional March algorithms.

Heat Transfer Characteristics of Spray Cooling Up to Critical Heat Flux on Thermoexcel-E Enhanced Surface (Thermoexcel-E 촉진 표면에서 임계 열유속까지의 분무 냉각 열전달 특성)

  • Lee, Yohan;Hong, Gwang-Wook;Lee, Jun-Soo;Jung, Dongsoo
    • Korean Journal of Air-Conditioning and Refrigeration Engineering
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    • v.28 no.9
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    • pp.373-380
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    • 2016
  • Spray cooling is a technology of increasing interest for electronic cooling and other high heat flux applications. In this study, heat transfer coefficients (HTCs) and critical heat fluxes (CHFs) are measured on a smooth square flat copper heater of $9.53{\times}9.53mm$ at $36^{\circ}C$ in a pool, a smooth flat surface and Thermoexcel-E surfaces are used to see the change in HTCs and CHFs according to the surface characteristics and FC-72 is used as the working fluid. FC-72 fluid has a significant influence on heat transfer characteristics of the spray over the cooling surface. HTCs are taken from $10kW/m^2$ to critical heat flux for all surfaces. Test results with Thermoexcel-E showed that CHFs of all enhanced surface is greatly improved. It can be said that surface form affects heat transfer coefficient and critical heat flux.

Modification of an Analysis Algorithm for DC Power Systems Considering Scalable Topologies

  • Lee, Won-Poong;Choi, Jin-Young;Park, Young-Ho;Kim, Soo-Nam;Won, Dong-Jun
    • Journal of Electrical Engineering and Technology
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    • v.13 no.5
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    • pp.1852-1863
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    • 2018
  • Direct current(DC) systems have recently attracted attention due to the increase in DC loads and distributed generations, such as renewable energy sources. Among these technologies, there has been much research into DC distribution systems or DC microgrids. Within this body of research, the main topics have been about optimum control and operation methods in terms of improving power efficiency. When DC systems are controlled and operated using power electronic devices such as converters, it is necessary to design and analyze them by considering the power electronics sections. For this reason, we propose a scalable DC system analysis algorithm, which considers various system configurations depending on the operating mode and location of the converter. The algorithm consists of power flow fault current calculations, and the results of the algorithm can be used for designing DC systems. The algorithm is implemented using MATLAB with defined input and output data. The verification of the algorithm is mainly performed using ETAP software, and the accuracy of the algorithm analysis can be confirmed through the results.

An Effective Viewport Resolution Scaling Technique to Reduce the Power Consumption in Mobile GPUs

  • Hwang, Imjae;Kwon, Hyuck-Joo;Chang, Ji-Hye;Lim, Yeongkyu;Kim, Cheong Ghil;Park, Woo-Chan
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.11 no.8
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    • pp.3918-3934
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    • 2017
  • This paper presents a viewport resolution scaling technique to reduce power consumption in mobile graphic processing units (GPUs). This technique controls the rendering resolution of applications in proportion to the resolution factor. In the mobile environment, it is essential to find an effective resolution factor to achieve low power consumption because both the resolution and power consumption of a GPU are in mutual trade-off. This paper presents a resolution factor that can minimize image quality degradation and gain power reduction. For this purpose, software and hardware viewport resolution scaling techniques are applied in the Android environment. Then, the correlation between image quality and power consumption is analyzed according to the resolution factor by conducting a benchmark analysis in the real commercial environment. Experimental results show that the power consumption decreased by 36.96% on average by the hardware viewport resolution scaling technique.

Trends and Implications of Digital Transformation in Vehicle Experience and Audio User Interface (차내 경험의 디지털 트랜스포메이션과 오디오 기반 인터페이스의 동향 및 시사점)

  • Kim, Kihyun;Kwon, Seong-Geun
    • Journal of Korea Multimedia Society
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    • v.25 no.2
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    • pp.166-175
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    • 2022
  • Digital transformation is driving so many changes in daily life and industry. The automobile industry is in a similar situation. In some cases, element techniques in areas called metabuses are also being adopted, such as 3D animated digital cockpit, around view, and voice AI, etc. Through the growth of the mobile market, the norm of human-computer interaction (HCI) has been evolving from keyboard-mouse interaction to touch screen. The core area was the graphical user interface (GUI), and recently, the audio user interface (AUI) has partially replaced the GUI. Since it is easy to access and intuitive to the user, it is quickly becoming a common area of the in-vehicle experience (IVE), especially. The benefits of a AUI are freeing the driver's eyes and hands, using fewer screens, lower interaction costs, more emotional and personal, effective for people with low vision. Nevertheless, when and where to apply a GUI or AUI are actually different approaches because some information is easier to process as we see it. In other cases, there is potential that AUI is more suitable. This is a study on a proposal to actively apply a AUI in the near future based on the context of various scenes occurring to improve IVE.

A 10b 100 MSample/s $1.4\;mm^2$ 56 mW 0.18 urn CMOS A/D Converter for Low-Power Multimedia Applications (저전력 멀티미디어 응용을 위한 10b 100 MSample/s $1.4\;mm^2$ 56 mW 0.18 um CMOS A/D 변환기)

  • Min Byoung-Han;Park Hee-Won;Chae Hee-Sung;Sa Doo-Hwan;Lee Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.12
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    • pp.53-60
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    • 2005
  • This work proposes a 10b 100 MS/s $1.4\;mm^2$ CMOS ADC for low-power multimedia applications. The proposed two-step pipeline ADC minimizes chip area and power dissipation at the target resolution and sampling rate. The wide-band SHA employs a gate-bootstrapping circuit to handle both single-ended and differential inputs with 1.2 Vp-p at 10b accuracy while the second-stage flash ADC employs open-loop offset sampling techniques to achieve 6b resolution. A 3-D fully symmetrical layout reduces the capacitor and device mismatch of the first-stage MDAC. The low-noise references are integrated on chip with optional off-chip voltage references. The prototype 10b ADC implemented in a 0.18 um CMOS shows the maximum measured DNL and INL of 0.59 LSB and 0.77 LSB, respectively. The ADC demonstrates the SNDR of 54 dB, the SFDR of 62 dB, and the power dissipation of 56 mW at 100 MS/s.