• Journal of Navigation and Port Research
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• v.36 no.8
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• pp.631-635
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• 2012

Underwater acoustic communication has multipath error because of reflection by sea-level and sea-bottom. The multipath of underwater channel causes signal distortion and error floor. In this paper, in order to design an efficient packet structure, we employ channel coding scheme and phase recovery algorithm. For channel coding scheme, half rate LDPC channel coding scheme with N=1944 and K=972 was used. Also, decision directed phase recovery was used for correcting phase offset induced by multipath. Based on these algorithms, we propose length of data for optimal packet structure in the environment of oceanic experimentation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.9
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• pp.1654-1665
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• 2008

This paper presents bit splitting methods to apply multilevel modulation to iterative codes such as turbo code, low density parity check code and turbo product code. Log-likelihood ratio method splits multilevel symbols to soft decision symbols using the received in-phase and quadrature component based on Gaussian approximation. However it is too complicate to calculate and to implement hardware due to exponential and logarithm calculation. Therefore this paper presents Euclidean, MAX, sector and center focusing method to reduce the high complexity of LLR method. Also, this paper proposes optimal soft symbol split method for three kind of iterative codes. Futhermore, 16-APSK modulator method with double ring structure for applying DVB-S2 system and 16-QAM modulator method with lattice structure for T-DMB system are also analyzed.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.9
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• pp.2029-2035
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• 2013

In this paper, we presented non-uniform quantization method for LDPC decoder specified in DVB-S2 standard. There are some problems in order to implement LDPC decoder in aspect to algorithm and implementation. In algorithm aspect, because of large number of iterations, LDPC decoding in general give rise to a large number of computation operations, mass power consumption, and decoding delay. Therefore, this paper studies Horizontal Shuffle Scheduling (HSS) algorithm which reduced iteration number without performance loss. In aspect of implementation, there are some solutions to improve the decoding speed, however this paper focused on non-uniform quantization which reduce the quantization bits of LDPC decoder. In simulation results, Decoding throughput of HSS LDPC decoder based on non-uniform quantization is 816Mbps and it improved 12% compared to conventional one.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.10C
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• pp.923-929
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• 2003

Turbo processing have been known as methods close to Shannon limit in the aspect of wireless multi-input multi-output (MIMO) communications similarly to wireless single antenna communication. The iterative processing can maximize the mutual effect of coding and interference cancellation, but LDPC coding has not been used for turbo processing because of the inherent decoding process delay. This paper suggests a LDPC coded MIMO system with turbo parallel space-time (Turbo-PAST) processing for high-speed wireless communications and proposes a average soft-output syndrome (ASS) check scheme at low signal to noise ratio (SNR) for the Turbo-PAST system to decide the reliability of decoded frame. Simulation results show that the suggested system outperforms conventional system and the proposed ASS scheme effectively reduces the amount of turbo processing iterations without performance degradation from the point of average number of iterations.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.11
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• pp.1248-1255
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• 2012

LDPC decoder architectures are generally classified into serial, parallel and partially parallel architectures. Conventional method of LDPC decoding in general give rise to a large number of computation operations, mass power consumption, and decoding delay. It is necessary to reduce the iteration numbers and computation operations without performance degradation. This paper studies horizontal shuffle scheduling(HSS) algorithm and self-correction normalized min-sum(SC-NMS) algorithm. In the result, number of iteration is half than conventional algorithm and performance is almost same between sum-product(SP) and SC-NMS. Finally, This paper implements high-speed LDPC decoder based on FPGA. Decoding throughput is 816 Mbps.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.5B
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• pp.573-581
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• 2011

The underwater channel is known to offer poor communications channel. The channel medium is highly absorptive and the transmission bandwidth is limited. In addition, the channel is highly frequency selective; the degree of selectiveness depends on a detailed geometry of the channel. Furthermore, the response changes over time as the channel conditions affecting the response such as water temperature, sea surface wind and salinity are time-varying. The transceiver design to deal with the frequency and time selective channel, therefore, becomes very challenging. It has been known that deep fading at certain specific sub-carriers are detrimental to OFDM systems. To mitigate this negative effect, the proposed coded OFDM system employs an LDPC code based modulation. In this paper, we aim 1) to provide a detailed underwater channel model; 2) to design a robust LDPC coded OFDM system; 3) to test the proposed system under a variety of channel conditions enabled by the channel model.

• Information and Communications Magazine
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• v.29 no.8
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• pp.26-33
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• 2012

차세대 통신 시스템에서는 고속 데이터 전송을 위해 다수의 송신자와 수신자가 네트워크를 구성하여 정보를 주고 받는 다자간 협력 통신을 가정한다. 이러한 상황에 적합한 오류 정정 부호로 이미 탁월한 오류 정정 능력을 검증 받은 저밀도 패리티 체크 (low-density parity-check, LDPC)부호, 이진 입력 이산 비기억 (discrete memoryless) 채널에서 무한한 길이에 대하여 채널 용량 (channel capacity)을 달성하는 것으로 알려진 극 부호 (polar code), 아직은 많이 개발되지 않았지만 보다 높은 전송률을 달성할 수 있는 다중점 (multiple point) 채널에서의 새로운 부호 등이 거론될 수 있다. 본고에서는 이러한 차세대 통신 시스템을 위한 오류 정정 부호들에 대해서 기본 이론과 최근 연구 동향, 그리고 향후 연구 방향 등을 소개하도록 한다.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2011.07a
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• pp.272-274
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• 2011

최근 들어 케이블 방송망을 기반으로 한 디지털 방송, VoIP(Voice over Internet Protocol), VOD(Video on Demand), 영상전화, 이동전화, 무선 랜 로밍 등의 다양한 멀티미디어 서비스의 출현과 향후 도입될 새로운 융합형 멀티미디어 서비스의 수용을 위해 케이블 망의 고도화에 대한 요구가 제기되었다. 특히 유럽을 중심으로 이러한 요구를 만족시키기 위해 DVB(Digital Video Broadcasting)-C2 규격의 개발이 진행되었다. DVB-C2 규격에서는 기존의 게이블 전송 규격인 DVB-C에 대해 30% 이상의 전송 효율을 높이고자 새로운 변조 방식과 채널 오류정정 부호 방식을 도입하였다. 이에 본 논문은 본 논문에서는 DVB-C2 규격에서 도입된 채널 오류정정 부호인 BCH(Bose, Chaudhuri, and Hocquenghem) 부호와 LDPC(Low Density Parity Check) 부호의 연접 방식에 대한 성능을 검증하고자 한다. 이를 위해 개발된 시뮬레이터의 소개와 이를 통한 시험결과를 제시한다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.5C
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• pp.423-431
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• 2010

In this paper, a modified sum-product algorithm to correct bit errors captured within the trapping sets, which are produced in decoding of low-density parity-check (LDPC) codes, is proposed. Unlike the original sum-product algorithm, the proposed decoding method consists of two stages. Whether the main cause of decoding failure is the trapping sets or not is determined at the first stage. And the bit errors within the trapping sets are corrected at the second stage. In the modified algorithm, the set of failed check nodes and the transition patterns of hard-decision bits are exploited to search variable nodes in the trapping sets. After inverting information of the variable nodes, the sum-product algorithm is carried out to correct the bit errors. As a result of simulation, the proposed algorithm shows continuously improved error performance with increase in the signal-to-noise ratio. It is, therefore, considered that the modified sum-product algorithm significantly reduces or possibly eliminates the error floor in LDPC codes.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.12
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• pp.2783-2790
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• 2010

In this paper, we first review LDPC codes in general and a belief propagation algorithm that works in logarithm domain. LDPC codes, which is chosen 802.11n for wireless local access network(WLAN) standard, require a large number of computation due to large size of coded block and iteration. Therefore, we presented three kinds of low computational algorithms for LDPC codes. First, sequential decoding with partial group is proposed. It has the same H/W complexity, and fewer number of iterations are required with the same performance in comparison with conventional decoder algorithm. Secondly, we have apply early stop algorithm. This method reduces number of unnecessary iterations. Third, early detection method for reducing the computational complexity is proposed. Using a confidence criterion, some bit nodes and check node edges are detected early on during decoding. Through the simulation, we knew that the iteration number are reduced by half using subset algorithm and early stop algorithm is reduced more than one iteration and computational complexity of early detected method is about 30% offs in case of check node update, 94% offs in case of check node update compared to conventional scheme. The LDPC decoder have been implemented in Xilinx System Generator and targeted to a Xilinx Virtx5-xc5vlx155t FPGA. When three algorithms are used, amount of device is about 45% off and the decoding speed is about two times faster than convectional scheme.