• The Transactions of the Korean Institute of Power Electronics
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• v.27 no.4
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• pp.356-366
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• 2022

This paper presents a mode transition method that applies frequency compensation technique of an LLC resonant converter for stable mode transition. LLC resonant converters used in various applications require high efficiency and high power density. However, because of circuit property, a wider voltage gain range equates to a greater circuit loss, so maintaining high efficiency at all voltage gain ranges is difficult. In this case, full bridge-half bridge mode transition method can be used, which maintains high efficiency even in a wide voltage gain range. However, this method causes damage to the circuit through overcurrent by the mode transition. This study analyzes the cause of the problem and proposes a mode transition method that applies frequency compensation technique to solve the problem. The proposed method verifies the stable transition through simulation analysis and experimental results.

• The Transactions of the Korean Institute of Power Electronics
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• v.17 no.6
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• pp.486-494
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• 2012

In this paper, we proposes the three-phase embedded Z-source inverter consisting of the three embedded Z-source converters and it's the output voltage control method. Each embedded Z-source converter can produce the bipolar output capacitor voltages according to duty ratio D such as single-phase PWM inverter. The output AC voltage of the proposed system is obtained as the difference in the output capacitor voltages of each converter, and the L-C output filter is not required. Because the output AC voltage can be stepped up and down, the boost DC converter in the conventional two-stage inverter is unnecessary. To confirm the validity of the proposed system, PSIM simulation and a DSP based experiment were performed under the condition of the input DC voltage 38V, load $100{\Omega}$, and switching frequency 30kHz. Each converter is connected by Y-connection for three-phase loads. In case that the output phase voltage is the same $38V_{peak}$ as the input DC voltage and is the 1.5 times($57V_{peak}$), the simulation and experimental results ; capacitor voltages, output phase voltages, output line voltages, inductor currents, and switch voltages were verified and discussed.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.1
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• pp.53-60
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• 2004

This work describes a l0b 150 MSample/s CMOS pipelined A/D converter (ADC) based on advanced bootsuapping techniques for higher input bandwidth than a sampling rate. The proposed ADC adopts a typical multi-step pipelined architecture, employs the merged-capacitor switching technique which improves sampling rate and resolution reducing by $50\%$ the number of unit capacitors used in the multiplying digital-to-analog converter. On-chip current and voltage references for high-speed driving capability of R & C loads and on-chip decimator circuits for high-speed testability are implemented with on-chip decoupling capacitors. The proposed AU is fabricated in a 0.18 um 1P6M CMOS technology. The measured differential and integral nonlinearities are within $-0.56{\~}+0.69$ LSB and $-1.50{\~}+0.68$ LSB, respectively. The prototype ADC shows the signal-to-noise-and-distortion ratio (SNDR) of 52 dB at 150 MSample/s. The active chip area is 2.2 mm2 (= 1.4 mm ${\times}$ 1.6 mm) and the chip consumes 123 mW at 150 MSample/s.

• Journal of Advanced Navigation Technology
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• v.21 no.3
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• pp.220-229
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• 2017

In this paper, To take advantage a variety of DC power as the boost DC-DC converter design specifications through the inductor L and capacitor C through PSPICE to calculate the best estimate of the value. Boost DC-DC converter with a switch device using IRF840 and reverse recovery time Schottky diodes with excellent with constant current controller using D10SC6M and resistance can be configured to considering the Power LED Module was driven by the production. Converter's switching frequency is 50 kHz, the first Duty Rate was made to increase gradually depending on the value of the detection were, 10 % in the output voltage. As a result, the simulated Boost Power LED driver characteristics is in comparison with the design specifications, 5% or less as the error was approximated. Finally, when input 15 V were offered, a stable output 24 V were obtained. and Dimming Control through the adjustment of brightness and current consumption were possible.

• The Transactions of the Korean Institute of Power Electronics
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• v.21 no.3
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• pp.224-230
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• 2016

In this study, a single-power-conversion series-resonant ac-dc converter with high efficiency and high power factor is proposed. The proposed ac-dc converter consists of single-ended primary-inductor converter with an active-clamp circuit and a voltage doubler with series-resonant circuit. The active-clamp circuit clamps the surge voltage and provides zero-voltage switching of the main switch. The series-resonant circuit consists of leakage inductance $L_{lk}$ of the transformer and resonant capacitors $ C_{r1}$ and $ C_{r2}$. This circuit also provides zero-current switching of output diodes $D_1$ and $D_2$. Thus, the switching loss of switches and reverse-recovery loss of output diodes are considerably reduced. The proposed ac-dc converter also achieves high power factor using the proposed control algorithm without the addition of a power factor correction circuit and a dc-link electrolytic capacitor. A detailed theoretical analysis and the experimental results for a 1kW prototype are discussed.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.7
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• pp.1442-1447
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• 2004

In this paper, a 6-Bit CMOS Folding and Interpolating AD Converter is presented. The converter is considered to be useful as an integrated part of a VLSI circuit handling both analog and digital signals as in the case of HDD or LAN applications. A built-in analog circuit for VLSI of a high-speed data communication requires a small chip area, low power consumption, and fast data processing. The proposed folding and interpolating AD Converter uses a very small number of comparators and interpolation resistors, which is achieved by cascading a couple of folders working in different principles. This reduced number of parts is a big advantage for a built-in AD converter design. The design is based on 0.25m double-poly 2 metal n-well CMOS process. In the simulation, with the applied 2.5V and a sampling frequency of 500MHz, the measurements are as follows: power consumption of 27mw, INL and DNL of $\pm$0.1LSB, $\pm$0.15LSB each, SNDR of 42dB with an input signal of 10MHz.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.271-275
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• 2001

In this paper, proposes a novel AC-DC converter of high power factor and high efficiency by partial resonant method. The input current waveform in proposed circuit is got to be a discontinuous sinusoidal form in proportion to magnitude of ac input voltage under the constant duty cycle switching. Thereupon, the input power factor is nearly unity and the control circuit is simple. Also the switching devices in a proposed circuit are operated with soft switching by the partial resonant method. The result is that the switching loss is very low and the efficiency of system is high. The partial resonant circuit makes use of a inductor using step up and $L^2SC$ (Loss-Less Snubber Condenser). The switching control technique of the converter is simplified for switches to drive in constant duty cycle. Some simulative results and experimental results are included to confirm the validity of the analytical results.

• Transactions of the Korean Society of Automotive Engineers
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• v.20 no.5
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• pp.145-151
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• 2012

New design of catalytic converter is proposed by optimization of DFSS (Design For Six Sigma) and DOE (Design Of Experiment) method which is based on taguchi matrix. As a result of the optimization of design of catalytic converter, this paper classifies Exhaust-downpipe shapes with 3 parameters to increase flow velocity uniformity of front catalytic substrate face from CFD results. after finishing with L9 Taguchi test matrix, it can be found the main effect of each design parameter of concept model, and optimal design level. in conclusion, it can be increase flow uniformity from 0.60 upto 0.80 with optimal diffuser shape for Turbo-charger.

• Korean Journal of Optics and Photonics
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• v.11 no.5
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• pp.340-346
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• 2000

Traveling wave type semiconductor optical amplifiers integrated with spot-size-converter (SSC-TW-SOA) have been extensively studied for the improvement of coupling effiClency With single-mode fiber and fO! the cost reducClon 111 a packaging In tlIis paper the slructural dependence of the spot-slZe-converter on the effective facet reflectlvllY $R_{eff}$ was experimentally as well as thcoretienlly mvestlgated. It was shown that not only a sufficient mode-conversion in a sse region along the latersl and tran~verse directions but also an introductIOn of angled-facet were very essential in order to reduce $R_{eff}$ Very small ripple less than 0.1 dB in an amplified spontaneous emission spectrum was observed with the fabncated SSC-lW-SOA which consists of the wrndow length of $20\mu\textrm{m}$, facet angle of $7^{\circ}$, and antlrelleetioll-coated facet of ] % reflectivity.tivity.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.11
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• pp.857-867
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• 2018

Active array radar is evolving into digital active array radar. Digital active array radar has many advantages for making several simultaneous radar beams from the digital receive data of each element. A digital-type transceiver(TR) module is suitable for this goal in radar. In this work, the design results of an L-band digital TR module are presented to verify the possibility of fabrication for a digital active array antenna. This L-band digital TR module consists of a gallium-nitride-type HPA to achieve a more than 350-W peak output power and one-chip transceivers that include a digital waveform generator and analog digital converter. The receiving gain was 47 dB, the noise figure was less than 2 dB, and the final output type of the four channel receiving paths was one optic signal.