• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.07a
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• pp.47-50
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• 2000

This paper investigated structural and electrical properties of $Y_2$ $O_3$ as a buffer layer of single transistor FRAM (ferroelectric RAM). $Y_2$ $O_3$ buffer layers were deposited at a low substrate temperature below 40$0^{\circ}C$ and then RTA (rapid thermal anneal) treated. Investigated parameters are substrate temperature, $O_2$ partial pressure, post-annealing temperature, and suppression of interfacial $SiO_2$ layer generation. For a well-fabricated sample, we achieved that leakage current density ( $J_{leak}$) in the order of 10$^{-7}$ A/$\textrm{cm}^2$, breakdown electric field ( $E_{br}$ ) about 2 MV/cm for $Y_2$ $O_3$ film. Capacitance versus voltage analysis illustrated dielectric constants of 7.47. We successfully achieved an interface state density of $Y_2$ $O_3$/Si as low as 8.72x1010 c $m^{-2}$ e $V^{-1}$ . The low interface states were obtained from very low lattice mismatch less than 1.75%.

• 전기의세계
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• v.28 no.4
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• pp.53-63
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• 1979

Interface recombination velocity in $Al_{x}$G $a_{1-x}$ As-GaAs and $Al_{0.85}$, G $a_{0.15}$ As-GaA $s_{1-y}$S $b_{y}$ heterojunction systems is studied as a function of lattice mismatch. The results are applied to the design of highly efficient III-V heterojunction solar cells. A horizontal liquid-phase epitaxial growth system was used to prepare p-p-p and p-p-n $Al_{x}$G $a_{1-x}$ As-GaA $s_{1-y}$S $b_{y}$-A $l_{x}$G $a_{1-x}$ As double heterojunction test samples with specified values of x and y. Samples were grown at each composition, with different GaAs and GaAs Sb layer thicknesses. A method was developed to obtain the lattice mismatch and lattice constants in mixed single crystals grown on (100) and (111)B oriented GaAs substrates. In the AlGaAs system, elastic lattice deformation with effective Poisson ratios .mu.$_{eff}$ (100=0.312 and .mu.$_{eff}$ (111B) =0.190 was observed. The lattice constant $a_{0}$ (A $l_{x}$G $a_{1-x}$ As)=5.6532+0.0084x.angs. was obtained at 300K which is in good Agreement with Vegard's law. In the GaAsSb system, although elastic lattice deformation was observed in (111) B-oriented crystals, misfit dislocations reduced the Poisson ratio to zero in (100)-oriented samples. When $a_{0}$ (GaSb)=6.0959 .angs. was assumed at 300K, both (100) and (111)B oriented GaAsSb layers deviated only slightly from Vegard's law. Both (100) and (111)B zero-mismatch $Al_{0.85}$ G $a_{0.15}$As-GaA $s_{1-y}$S $b_{y}$ layers were grown from melts with a weight ratio of $W_{sb}$ / $W_{Ga}$ =0.13 and a growth temperature of 840 to 820 .deg.C. The corresponding Sb compositions were y=0.015 and 0.024 on (100) and (111)B orientations, respectively. This occurs because of a fortuitous in the Sb distribution coefficient with orientation. Interface recombination velocity was estimated from the dependence of the effective minority carrier lifetime on double-heterojunction spacing, using either optical phase-shift or electroluminescence timedecay techniques. The recombination velocity at a (100) interface was reduced from (2 to 3)*10$^{4}$ for y=0 to (6 to 7)*10$^{3}$ cm/sec for lattice-matched $Al_{0.85}$G $a_{0.15}$As-GaA $s_{0.985}$S $b_{0.015}$ Although this reduction is slightly less than that expected from the exponential relationship between interface recombination velocity and lattice mismatch as found in the AlGaAs-GaAs system, solar cells constructed from such a combination of materials should have an excellent spectral response to photons with energies over the full range from 1.4 to 2.6 eV. Similar measurements on a (111) B oriented lattice-matched heterojunction produced some-what larger interface recombination velocities.ities.ities.s.

• Transactions of the Korean Society of Automotive Engineers
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• v.18 no.1
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• pp.99-104
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• 2010

It is a frequent occurrence in urban traffic - a low-speed collision in which one vehicle hits the back of another. The vehicles often sustain expensive damage. Bumpers can reduce this damage, but only line up so the initial contact in an impact is bumper to bumper. Then the bumpers on the colliding vehicles have to absorb the crash energy, keeping damage away from expensive sheet metal, lights, and other components. In real world accidents, Bumper mismatches in crashes are increasing, and the resulting repair costs from low-speed collisions are escalating. In this study, we investigated the bumper rail height and analyzed their effects on repair cost. Futhermore, Our 16kph front-into-rear crash tests demonstrates bumper mismatch problem.

• Journal of Korea Multimedia Society
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• v.19 no.5
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• pp.848-855
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• 2016

Face recognition has received a great deal of attention for the wide range of applications in real-world scenario. In this scenario, mismatches (so called heterogeneity) in terms of resolution and illumination between gallery and test face images are inevitable due to the different capturing conditions. In order to deal with the mismatch problem, we propose a local feature learning method using deep canonical correlation analysis (DCCA) for heterogeneous face recognition. By the DCCA, we can effectively reduce the mismatch between the gallery and the test face images. Furthermore, the proposed local feature learned by the DCCA is able to enhance the discriminative power by using facial local structure information. Through the experiments on two different scenarios (i.e., matching near-infrared to visible face images and matching low-resolution to high-resolution face images), we could validate the effectiveness of the proposed method in terms of recognition accuracy using publicly available databases.

• Proceedings of the KIEE Conference
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• 1998.11c
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• pp.737-739
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• 1998

Gate insulators using various fluoride films were investigated for thin film transistor applications. Conventional oxide containing materials exhibited high interface states, high $D_{it}$ gives an increased threshold voltage and poor stability of TFT. To improve TFT performances, we must reduce interface trap charge density between Si and gate insulator. In this paper, we investigated gate insulators such as such as $CaF_2$, $SrF_2$, $MgF_2$ and $BaF_2$. These materials exhibited an improvement in lattice mismatch, difference in thermal expansion coefficient, and electrical stability MIM and MIS devices were employed for an electrical characterization and structural property examination. Among the various fluoride materials, $CaF_2$ film showed an excellent lattice mismatch of 0.737%, breakdown electric field higher than 1.7MV/cm and leakage current density of $10^{-6}A/cm^2$. This paper probes a possibility of new gate insulator material for TFT application.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.5
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• pp.26-32
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• 2008

The performance of an analog winner-take-all(WTA) circuit is affected by the corner error and the offset error. Despite the fact that the corner error can be reduced with large transconductance of the transistor, the offset error caused by device mismatch has not been completely studied. This paper presents the complete offset error analysis, and proposes low offset design guidelines and an offset cancellation scheme. The experimental results show good agreement with the theoretical analysis and the drastic improvement of the offset error.

• Journal of information and communication convergence engineering
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• v.11 no.4
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• pp.288-292
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• 2013

In this paper, a carbon implant is investigated in detail from the perspectives of performance advantages and side effects for the thick n-type metal-oxide-semiconductor field-effect transistor (n-MOSFET). Threshold voltage ($V_{th}$) adjustment using a carbon implant significantly improves the $V_{th}$ mismatch performance in a thick (3.3-V) n-MOS transistor. It has been reported that a bad mismatch occurs particularly in the case of 0.11-${\mu}m$ $V_{th}$ node technology. This paper investigates a carbon implant process as a promising candidate for the optimal $V_{th}$ roll-off curve. The carbon implant makes the $V_{th}$ roll-off curve perfectly flat, which is explained in detail. Further, the mechanism of hot carrier injection lifetime degradation by the carbon implant is investigated, and new process integration involving the addition of a nitrogen implant in the lightly doped drain process is offered as its solution. This paper presents the critical side effects, such as Isub increases and device performance shifts caused by the carbon implant and suggests an efficient method to avoid these issues.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2012.05a
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• pp.873-874
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• 2012

• Transactions on Electrical and Electronic Materials
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• v.15 no.4
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• pp.207-212
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• 2014

Aluminum-doped zinc oxide (AZO) films were deposited on SiOC/Si wafer by an RF-magnetron sputtering system, by varying the deposition parameters of radio frequency power from 50 to 200 W. To assess the correlation of the optical properties between the substrate and AZO thin film, photoluminescence was measured, and the origin of deep level emission of AZO thin films grown on SiOC/Si wafer was studied. AZO formed on SiOC/Si substrates exhibited ultraviolet emission due to exciton recombination, and the visible emission was associated with intrinsic and extrinsic defects. For the AZO thin film deposited on SiOC at low RF-power, the deep level emission near the UV region is attributed to an increase of the variations of defects related to the AZO and SiOC layers. The applied RF-power influenced an energy gap of localized trap state produced from the defects, and the gap increased at low RF power due to the formation of new defects across the AZO layer caused by lattice mismatch of the AZO and SiOC films. The optical properties of AZO films on amorphous SiOC compared with those of AZO film on Si were considerably improved by reducing the roughness of the surface with low surface ionization energy, and by solving the problem of structural mismatch with the AZO film and Si wafer.

• Journal of IKEEE
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• v.23 no.4
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• pp.1473-1476
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• 2019

Accurate material information is very important in PCB (Printed Circuit Board) design. In an integrated mast of a battleship, heat reduction is essential for stealth functionality. So heat dissipation from internal control equipments should be reduced as much as possible. Control equipments mostly consist of PCBs, but it often suffers from impedance mismatching due to imprecise Dk (Dielectric Constant), which significantly increases heat dissipation. In this paper, measurement methods of Dk is investigated. Also, effects on impedance mismatch by Dk variation with operating frequency is investigated.