• International Journal of Advanced Culture Technology
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• 제7권4호
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• pp.313-320
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• 2019

Nowadays, as the availability of tiny, low-cost microcomputer increases at a high level, mobile robots are experiencing remarkable enhancements in hardware design, software performance, and connectivity advancements. In order to control Turtlebot 2, several algorithms have been developed using the Robot Operating System(ROS). However, ROS requires to be run on a high-cost computer which increases the hardware cost and the power consumption to the robot. Therefore, design an algorithm based on low-cost hardware is the most innovative way to reduce the unnecessary costs of the hardware, to increase the performance, and to decrease the power consumed by the computer on the robot. In this paper, we present a path-finding algorithm for TurtleBot 2 based on low-cost hardware. We implemented the algorithm using Raspberry pi, Windows 10 IoT core, and RPLIDAR A2. Firstly, we used Raspberry pi as the alternative to the computer employed to handle ROS and to control the robot. Raspberry pi has the advantages of reducing the hardware cost and the energy consumed by the computer on the robot. Secondly, using RPLIDAR A2 and Windows 10 IoT core which is running on Raspberry pi, we implemented the path-finding algorithm which allows TurtleBot 2 to navigate from the starting point to the destination using the map of the area. In addition, we used C# and Universal Windows Platform to implement the proposed algorithm.

• 정보과학회 논문지
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• 제44권5호
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• pp.469-475
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• 2017

최근에 제안된 NVMe 기반의 멀티큐 SSD는 여러 개의 코어들이 전담 큐들을 통해 병렬적으로 입출력을 수행함으로써 높은 SSD 대역폭을 제공한다. 이러한 멀티큐 SSD에 대해서 입출력 응용마다 대역폭 지분을 제공하기 위해서는 각 코어에게 대역폭 지분을 제공하는 것이 요구되며, 이를 위한 공정지분 스케줄링이 필요하다. 본 논문은 멀티큐 SSD를 위해 멀티코어 확장성을 제공하는 공정 큐잉 알고리즘을 제안한다. 제안하는 알고리즘은 무작위 선택 기법을 이용하여 코어간 동기화 오버헤드를 최소화하고 각 코어가 가중치에 비례하는 대역폭을 수신하도록 한다. 실험 결과, 제안하는 알고리즘은 block-mq를 사용하는 커널에서 정확한 대역폭 분할 효과를 보여주며, 코어 개수에 상관 없이 기존 FlashFQ 스케줄러보다 우수한 성능을 보여준다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2008년도 제39회 하계학술대회
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• pp.140-141
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• 2008

Generally, an iron-cored instrument transformer has differences between the primary current and the secondary current transformer due to the hysteresis characteristics of the core. The errors of the instrument transformer can be removed by using a compensating algorithm. This paper describes the iron-cored electronic zero-phase current transformer(EZCT) having a compensating algorithm that removes the effects of the hysteresis characteristics of the iron-core. This product composes an iron-cored ZCT and an intelligent electronic device(IED) ported the compensating algorithm. The test results shows that the innovative new product can improve the performance of the conventional ZCT.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 추계학술대회 논문집 전력기술부문
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• pp.262-265
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• 2003

During magnetic inrush or over-excitation saturation of the core in a transformer draws a large exciting current. This can cause mal-operation of a differential relay. This paper proposes a modified current differential relay for transformer protection. In order to cope with the remanent flux at the beginning. the start of saturation of the core is detected and the core flux at the instant is estimated by inserting the differential current into a magnetization curve. Then, this core flux value can be used to calculate the core flux. The proposed relay calculates the core-loss current from the induced voltage and the core-loss resistance; the relay calculates the magnetizing current from the core flux and the magnetization curve. Finally, the relay obtains the modified differential current by subtracting the core-loss current and the magnetizing current from the conventional differential current. The proposed technique not only discriminates magnetic inrush and over-excitation from an internal fault, but also improves the speed of the conventional relay.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2008년도 제39회 하계학술대회
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• pp.136-137
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• 2008

A current transformer(CT) should provide the faithful reproduction of the primary current to the measurement or the protection equipments. The exciting current resulting from the hysteresis characteristics of the core causes an error between the primary current and the secondary current of the CT. A compensating algorithm for the secondary current of the current transformer that removes the effects of the hysteresis characteristics of the iron-core has proposed. The core flux linkage is calculated by integrating the measured secondary current, and then inserted into the flux-magnetizing current curve to obtain the magnetizing current. The exciting current at every sampling interval is obtained by summing the core-loss and magnetizing currents and added to the measured current to obtain the correct current. This paper describes the innovative new product of the iron-cored electronic current transformer. This product composes an iron-cored CT and an intelligent electronic device(IED) ported the compensating algorithm. The test results of the iron-cored electronic current transformers in Korea Electro-technology Research Institute(KERI) are presented.

• Geomechanics and Engineering
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• 제10권6호
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• pp.709-726
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• 2016

Corrugated-core sandwich panels are prevalent for many applications in industries. The researches performed with the aim of optimization of such structures in the literature have considered a deterministic approach. However, it is believed that deterministic optimum points may lead to high-risk designs instead of optimum ones. In this paper, an effort has been made to provide a reliable and robust design of corrugated-core sandwich structures through stochastic and probabilistic multi-objective optimization approach. The optimization is performed using a coupling between genetic algorithm (GA), Monte Carlo simulation (MCS) and finite element method (FEM). To this aim, Prob. Design module in ANSYS is employed and using a coupling between optimization codes in MATLAB and ANSYS, a connection has been made between numerical results and optimization process. Results in both cases of deterministic and probabilistic multi-objective optimizations are illustrated and compared together to gain a better understanding of the best sandwich panel design by taking into account reliability and robustness. Comparison of results with a similar deterministic optimization study demonstrated better reliability and robustness of optimum point of this study.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2005년도 추계종합학술대회
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• pp.659-662
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• 2005

A parameterized FFT/IFFT core generator (PFFT_CoreGen) is designed, which can be used as an essential IP (Intellectual Property) in various OFDM modem designs. The PFFT_CoreGen generates Verilog-HDL models of FFT cores in the range of 64 ${\sim}$ 2048-point. To optimize the performance of the generated FFT cores, the PFFT_CoreGen can select the word-length of input data, internal data and twiddle factors in the range of 8-b ${\sim}$ 24-b. Some design techniques for low-power design are considered from algorithm level to circuit level.

• Nuclear Engineering and Technology
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• 제36권1호
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• pp.53-63
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• 2004

The research was performed to develop a CANDU-6 Core Monitoring System(CCMS) that enables operators to have efficient core management by monitoring core power distribution, burnup distribution, and the other important core variables and managing the past core history for Wolsong nuclear power plant unit 1. The CCMS uses Reactor Fueling Simulation Program(RFSP, developed by AECL) for continuous core calculation by integrating the algorithm and assumptions validated and uses the information taken from Digital Control Computer(DCC) for the purpose of producing basic input data. The CCMS has two modules; CCMS server program and CCMS client program. The CCMS server program performs automatic and continuous core calculation and manages overall output controlled by DataBase Management System. The CCMS client program enables users to monitor current and past core status in the predefined GUI(Graphic-User Interface) environment. For the purpose of verifying the effectiveness of CCMS, we compared field-test data with the data used for Wolsong unit 1 operation. In the verification the mean percent differences of both cases were the same($0.008\%$), which showed that the CCMS could monitor core behaviors well.

• 한국인터넷방송통신학회논문지
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• 제20권1호
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• pp.135-140
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• 2020

최근 사물인터넷, 지능형 시스템 등의 활성화로 실시간 임베디드 시스템의 전력 절감 기술이 중요해지고 있다. 본 논문은 멀티코어 이기종메모리 환경에서 실시간 시스템의 전력 소모량을 절감하는 P-GA (parallel genetic algorithm) 스케줄링 알고리즘을 제안한다. P-GA는 멀티코어를 위한 PF (proportional fairness) 알고리즘에 기반한 프로세서의 전압 및 주파수 동적 조절 기법에 차세대 비휘발성메모리 기술을 결합하여 시스템의 전력 소모를 더욱 줄인다. 특히, 유전 알고리즘을 사용하여 태스크별 수행 프로세서의 전압 및 주파수 모드와 메모리의 종류를 최적화하여 태스크 집합의 전력 소모량을 최소화한다. 시뮬레이션 실험을 통해 P-GA가 기존 방식 대비 최대 2.85배의 전력 소모량을 감소할 수 있음을 보인다.

• 대한임베디드공학회논문지
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• 제8권1호
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• pp.17-24
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• 2013

In this paper, we present a multi-core processor including multimedia specific instructions to process multimedia data efficiently in the mobile environment. Multimedia specific instructions exploit subword level parallelism (SLP), while the multi-core processor exploits data level parallelism (DLP). These combined parallelisms improve the performance of multimedia processing applications. The proposed multi-core processor including multimedia specific instructions is implemented and tested using a Xilinx ISE 10.1 tool and SoCMaster3 testbed system including Vertex 4 FPGA. Experimental results using a fire detection algorithm show that multimedia specific instructions outperform baseline instructions in the same multi-core architecture in terms of performance (1.2x better), energy efficiency (1.37x better), and area efficiency (1.23x better).