• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.3
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• pp.96-106
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• 1996

One of the major problems for poly-Si TFTs is the large off state leakage current. LDD (lightly doped drain) and offset gated structures have been employed in order to reduce the leakage current. However, these structures also redcue the oN current significantly due to the extra series resistance caussed by the LDD or offset region. It is desirable to have a device which would have the properties of the offset gated structure in the OFF state, while behaving like a fully gated device in the oN state. Therefore, we propose a new thin film transistor with pnp junction gate which reduce the leakage curretn during the OFF state without sacrificing the ON current during the ON state.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.4
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• pp.112-120
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• 1996

With the MOsES (mask oxide sidewall etch scheme)process which uses the conventional i-line stepper and isotropic wet etching, CMOSFET's with fine gate pattern of 0.1.mu.m CMOSFET device, the screening oxide is deposited before the low energy ion implantation for source/drain extensions and two step sidewall scheme is adopted. Through the characterization of 0.1.mu.m CMOSFET device, it is found that the screening oxide deposition sheme has larger capability of suppressing the short channel effects than two step sidewall schem. In cse of 200.angs.-thick screening oxide deposition, both NMOSFET and PMOSFET maintain good subthreshold characteristics down to 0.1.mu.m effective channel lengths, and show affordable drain saturation current reduction and low impact ionization rates.

• Ceramist
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• v.23 no.2
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• pp.145-165
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• 2020

Halide perovskites are promising photovoltaic materials due to their excellent optoelectronic properties like high absorption coefficient, low exciton binding energy and long diffusion length, and single-junction solar cells consisting of them have shown a high certified efficiency of 25.2%. Despite of high efficiency, perovskite photovoltaics show poor stability under actual operational condition, which is the mostly critical obstacle for commercialization. Given that the stability of the perovskite devices is significantly affected by charge-transporting layers, the use of inorganic charge-transporting layers with better intrinsic stability than the organic counterparts must be beneficial to the enhanced device reliability. In this review article, we summarized a number of studies on the inorganic charge-transporting layers of the perovskite solar cells, especially focusing on their effects on the enhanced device reliability.

• Proceedings of the KIEE Conference
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• 2009.04b
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• pp.125-130
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• 2009

This paper reviews the characteristics technical trends in Power MOSFET technology that are leading to improvements in power loss for power electronic system. The power electronic technology requires the marriage of power device technology with MOS-gated device and bipolar analog circuits. The technology challenges involved in combining power handling capability with finger gate, trench array, super junction structure, and SiC transistor are described, together with examples of solutions for telecommunications, motor control, and switch mode power supplies.

• New & Renewable Energy
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• v.5 no.4
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• pp.34-37
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• 2009

Using six SMD(surface mount device) type AlGaAs/GaAs single junction solar cells connected in series, a power source was fabricated for a white GaN LED. The electrical properties of the power source was measured and analyzed under one sun (100mW/$cm^2$) and various indoor light (300 - 900 lux) conditions. Under 600 lux indoor light condition, output power was 17.06 ${\mu}W$ and it was 30.75 ${\mu}W$ under 900 lux indoor light condition. Using the fabricated solar cell power supply, we have turned on the white GaN LED. It was worked well under 15 ${\mu}W$(at 480 lux) power supplied from solar cell array. This kind of solar cell power supply can be used as a power source for ubiquitous sensor network (USN).

• Journal of Magnetics
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• v.11 no.1
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• pp.25-29
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• 2006

Recent experiments have demonstrated high TMR ratios in MTJs with the MgO barrier [1,2]. The CoFeB/MgO/CoFeB junctions showed better properties than the CoFe/MgO/CoFe junctions because the MgO layer had a good crystalline structure with (001) texture and smooth and sharp interface between CoFeB/MgO [3]. The amorphous CoFeB with 20 at%B starts the crystallization at $340^{\circ}C$ [4] and this crystallization of the CoFeB helps obtaining the high TMR ratio. In this work, the compositional changes in the MgO barrier and at the interface of CoFeB/MgO/CoFeB after the CoFeB crystallization were studied in annealed MTJs. XPS depth profiles were utilized. TEM analyses showed that the MgO barrier had (100) texture on CoFeB in the junctions. B in the bottom CoFeB layer diffused into the MgO barrier and B-oxide was formed at the interface of CoFeB/MgO/CoFeB after the CoFeB crystallization.

• Journal of the Korean Vacuum Society
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• v.14 no.4
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• pp.229-237
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• 2005

The degradation phenomena in SiGe hetero-junction bipolar transistors(SiGe HBTs) induced by bias stress are investigated in this review. If SiGe HBTs are stressed over a specific time interval, the device parameters deviate from their nominal values due to the internal changes in the devices. Reverse-bias stress on emitter-base(EB) junctions causes base current increase and current gain decrease because carriers accelerated by the electrical field generate recombination centers. When forward-bias current stress is conducted at an ambient temperature above $140^{\circ}C$ , hot carriers produced by Auger recombination or avalanche multiplication induce current gain fluctuation. Mixed-mode stressing, where high emitter current and high collector-base voltage are simultaneously applied to the device, provokes base current rise as EB reverse-bias stressing does.

• Transactions on Electrical and Electronic Materials
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• v.17 no.5
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• pp.275-279
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• 2016

This is a brief review on light trapping in Si based thin film solar cells with textured surfaces and transparent conducting oxide front electrodes. The light trapping scheme appears to be essential in improving device efficiency over 10%. As light absorption in a thin film solar cells is not sufficient, light trapping becomes necessary to be effectively implemented with a textured surface. Surface texturing helps in the light trapping, and thereby raises short circuit current density and its efficiency. Such a scheme can be adapted to single junction as well as tandem solar cell, amorphous or micro-crystalline devices. A tandem cell is expected to have superior performance in comparison to a single junction cell and random surface textures appears to be preferable to a periodic structures.

• Progress in Superconductivity and Cryogenics
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• v.18 no.4
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• pp.5-8
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• 2016

We report on the fabrication and measurement results of the electrical transport properties of superconductor-normal metal-superconductor (SNS) weak links, made of PbIn superconductor and Au metal. The maximum supercurrent reaches up to ${\sim}6{\mu}A$ at T = 2.3 K and the supercurrent persists even at T = 4.7 K. Magnetic field dependence of the critical current is consistent with a theoretical fit using the narrow junction model. The superconducting quantum interference device (SQUID) was also fabricated using two PbIn-Au-PbIn junctions connected in parallel. Under perpendicular magnetic field, we clearly observed periodic oscillations of dV/dI with a period of magnetic flux quantum threading into the supercurrent loop of the SQUID. Our fabrication methods would provide an easy and simple way to explore the superconducting proximity effects without ultra-low-temperature cryostats.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.22-23
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• 2008

The conventional IGBT has two problems to make the device taking high performance. The one is high on state voltage drop associated with JFET region, the other is low breakdown voltage associated with concentrating the electric field on the junction of between p base and n drift. This paper is about the structure to effectively improve both the lower on state voltage drop and the higher breakdown voltage than the conventional IGBT. For the fabrication of the circular trench IGBT with the circular trench layer, it is necessary to perform the only one wet oxidation step for the circular trench layer. Analysis on both the on state voltage drop and the Breakdown voltage show the improved values compared to the conventional IGBT structure. Because the circular trench layer disperses electric field from p base and n drift junction to circular trench, the breakdown voltage increase. The on state voltage drop decrease due to reduction of JFET region and direction change of current path which pass through reversed layer channel.