• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.7
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• pp.95-101
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• 1994

A novel concept for the analysis of planar devices with a field limiting ring(FLR) is presented which allows analytic expressions in a normalized form for the potential distributions of FLR structure. Based on the method of image charges the main and ring junctions with identical cylindrical edges are kept to be two different equipotential surfaces. The potential relations between main and ring junction of the FLR structure are compared with 2-dimensional device simulation program. MEDICI. A good accordance is found. Comparisions with experimental data reported for the optimum ring spacing and the relative improvement of the breakdowm voltages in the FLR sturcture show the validity of the concept. The normalized expressions allow a universal application regardless to the junction depths and background doping levels.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.1
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• pp.43-51
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• 2006

80-nm self-aligned n-and p-channel I-MOS devices were demonstrated by using a novel fabrication method featuring double sidewall spacer, elevated drain structure and RTA process. The fabricated devices showed a normal transistor operation with extremely small subthreshold swing less than 12.2 mV/dec at room temperature. The n- and p-channel I-MOS devices had an ON/OFF current of 394.1/0.3 ${\mu}A$ and 355.4/8.9 ${\mu}A$ per ${\mu}m$, respectively. We also investigated some critical issues in device design such as the junction depth of the source extension region and the substrate doping concentration.

• 전기의세계
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• v.30 no.10
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• pp.645-654
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• 1981

A technique has been proposed for fabricating a submicron channel vertical V-groove JFET using standard photolithography. A finite element numerical simulation of the V-groove JFET operation was performed using a FORTRAN progrma run on a Cyber-174 computer. The numerical simulation predicts pentode like common source output characteristics for the p$^{+}$n Vertical V-groove JFET with maximum transconductance representing approximately 6 precent of the zero bias drain conductance value and markedly high drain conductance at large drain voltages. An increase in the acceptor concentration of the V-groove JFET gate was observed to cause a significant increase in the transconductance of the device. Therefore, as above mentioned, this paper is study on the analysis of a Vertical V-groove Junction Field Effect Transistor with Finite Element Method.d.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2006.05a
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• pp.443-444
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• 2006

The influence of the heat sources on LED junction temperature are Engine room air, Back plate, Electric power device, and so on. LED lamp cooling system is considered to be an important subject fur high light efficiency. Because LED Chip will be problem When LED junction temperature be over $135^{\circ}C$, In this Study, The Looped Heat Pipe System is considered to prevent LED Chip fall. The LHPS is consist of evaporator part, condenser part, heat pipe part. The working fluid of LHPS is HCFC-123. In this study, to prevent LED Chipfall, we study thermal characteristics for Looped Heat Pipe System with LED lamp.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.268-268
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• 2011

열전소자를 사용하여 발광다이오드의 발열을 개선한다. 열전소자(Thermoelectric device: TED)의 펠티에효과(Peltier effect)를 이용하여 발광다이오드(Light Emitting Diodes: LED)의 접합온도 (Junction Temperature)를 제어한다. 열전소자의 구동 전력을 제어하여, 발광다이오드의 사용 전류에 대한 접합온도의 특성을 조사한다. 열전소자의 입력 전력 0.2W에 대하여, 일반 조명용 또는 표시 장치로 사용되는 1W급 고전력 LED를 정격전류(350 mA)로 구동할 때 접합온도를 최저 $69^{\circ}C$로 유지할 수 있다. 열전소자의 구동 전력이 0.2W일 때, 발광다이오드의 접합온도 $110^{\circ}C$에 대하여 최대 사용 가능 전류는 560 mA로 예측된다.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.847-848
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• 2006

R-type thermocouple(TC) interface circuits with cold-junction compensator(CJC) and its broken wires detection was developed. The circuit consists of a CJC device, a instrumentation amplifier(IA), and two resistor and a diode for broken wire detection. The experiment results show that the interface circuit has a good CJC function on the temperature range for $20^{\circ}C$ to $1400^{\circ}C$. At the range the output voltage of the IA was -14V when the TC was broken. At normal operation condition the output voltage of IA was 0V to 10V for the temperature range.

• Journal of electromagnetic engineering and science
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• v.13 no.4
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• pp.214-223
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• 2013

This paper proposes a theoretical analysis of hidden device detection and a design of multiband circular polarization patch array antenna for non-linear junction detector system application. A good axial ratio of circular polarization patch antenna is realized by a new approach that employs inclined slots, two rectangular grooves and a truncated ground for the conventional antenna. A good axial ratio of the 1.5 dB lower is measured by having an asymmetric gap distance between the ground planes of the coplanar waveguide feeding structure. The common ground plane of the linear array has an optimum trapezoidal slot array to reduce the mutual coupling without increasing the distance between the radiators. The higher gain of about 1 dBi is realized by using the novel common ground structure. The measured return loss, gain, and axial ratio of the proposed single radiator, as well as the proposed array antennas, showed a good agreement with the simulated results.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.5
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• pp.276-281
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• 2014

A high-responsive Schottky device has been achieved by forming a thin metal deposition on a Si substrate. Two-different metals of Ni and Ag were used as a Schottky metal contact with a thickness about 10 nm. The barrier height formation between metal and Si determines the rectifying current profiles. Ag-embedding Schottky device gave an extremely high response of 17,881 at a wavelength of 900 nm. An efficient design of Schottky device may applied for photoelectric devices, including photodetectors and solar cells.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.10
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• pp.1829-1834
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• 2008

An optical switch/modulator is designed and the light propagating characteristics is analyzed by the simplified BPM. The distinctive feature of the switch/modulator is that all the waveguide branches are designed to be single-mode. Principle of the device is based on the coupled mode theory in the Y-junction interconnecting waveguide. In spite of all the waveguides are designed to be single-mode, adjusting the interconnecting waveguide length of the device, the same characteristics as existing device up to date is obtainable. Numerical results show that the switching characteristics periodically depends on the interconnecting waveguide length with a spatial of about 150${\mu}m$ in the Ti:LiNbO3 step index waveguide. The concept of design would be utilized effectively in fabricating the monolithic high density of optical integrated circuit.

• Journal of Advanced Marine Engineering and Technology
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• v.23 no.2
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• pp.159-167
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• 1999

This paper presents a new transient voltage blocking device(TOBD)which low power and high frequency bandwidth to protect info-communication facilities from transient voltages. Conventional protection devices have some problems such as low frequency bandwidth low ener-gy capacity and high remnant voltage. in order to improve these limitations a hybrid type TOBD which consists of a gas tube avalanche diodes and junction type field effect transistor (JFETs) is developed. The TOBD differs from the conventional protection devices in configuration and JFETs are used as an active non-linear element and a high speed switching diode with low capacitance limited high current. Therefore the avalanche diode with low energy capacity are protected from the high current and the TOBD has a very small input capacitance. From the performance test using combination surge generator which can produce $1.2/50{\mu}m$ 4.2 kV/max, $8/20{\mu}m$ 2.1 kAmax it is confirmed that the proposed TOBD has an excellent protection per-formance in tight clamping voltage and limiting current characteristics.