• Title/Summary/Keyword: Junction Area

검색결과 341건 처리시간 0.029초

반전층에서의 애벌런치 현상을 이용한 냉음극 (Cold Cathode using Avalanche Phenomenon at the Inversion Layer)

  • 이정용
    • 한국진공학회지
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    • 제16권6호
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    • pp.414-423
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    • 2007
  • FED(Field Emission Display)는 특히 소형, 고품질 평면화면분야에서 종래의 기술들과 뚜렷이 구별되는 이점을 가지고 있다. FED를 실리콘 웨이퍼에 System-on-Chip(SoC)화하는 가능성을 검토하기 위해, 우리는 p-n 접합을 평면 디스플레이의 전자선원(electron beam source)으로 사용할 수 있는지를 실험하였다. Cantilever(외팔보)형 게이트로부터의 전계로 반전층을 형성하여 p-n 접합을 형성하는 새로운 구조를 제조하였다. 약 1 ${\mu}m$ 정도의 높이에 있는 cantilever형 게이트에 220V이상의 전압을 가했을 때 반전층(inversion layer)이 형성되었고, 애벌런치 항복이성공적으로 이루어졌다. 극히 얕은 p-n 접합에서 애벌런치 항복 시 관측되는 전자방출 효과와 그 특성이 비교되었고 실험결과와 향후 연구방향이 논의 되었다.

마이크로파 여기 프라즈마법으로 제조한 강자성 터널링 접합의 국소전도특성 (Local Current Distribution in a Ferromagnetic Tunnel Junction Fabricated Using Microwave Excited Plasma Method)

  • 윤대식;김철기;김종오
    • 한국자기학회지
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    • 제13권2호
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    • pp.47-52
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    • 2003
  • DC 마그네트론 스파터법과 RLSA(Radial Line Slot Antenna)을 이용한 마이크로파 여기 프라즈마를 이용하여 Ta/Cu/Ta/NiFe/Cu/Mn$_{75}$Ir$_{25}$/ $Co_{70}$Fe$_{30}$/Al-oxide 구조의 접합을 제조한 후, contact-mode AM(Atomic Force Microscope)을 이용하여 Al 산화막의 국소전도 특성의 평가를 수행하였다. AFM 동시전류측정으로부터, 얻어지는 표면상과 전류상은 대응하지 않는다. 국소 전류-전압(I-V)의 측정 결과, 전류상은 절연층의 barrier height의 분포를 나타내고 있다는 것을 알았다.다.다.

전이성 유암에서 Woven Dacrorl Y graft를 이용한 상대공정맥 재건술 -치험 III- (A Case of Metastatic breast Cancer and Reconstruction of Superior Vena Cava by Woven Dacron Y Graft)

  • 이원진;신호승
    • Journal of Chest Surgery
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    • 제29권3호
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    • pp.346-349
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    • 1996
  • This 32 year old female patient underwent left radical mastectomy due to ductal carcinoma on May 1990, and treated with FAM (5-fluorouracil, Adriamycin and Mitomycin C) regimen postoperatively. However, right cervical Iymph node enlargement and facial edema progressively developed since December 199). On April 1994, operation was performed, and findings were as followes; x4$\times$5$\times$7 to 1 : 1 $\times$ 1 cm sized multiple enlarged and hyperemic Iymph nodes were scatterred throughout submandibular area to the junction of superior vents cave and pericardium, and partially invaded both anterior segmental lobe, sternum and both distal tip of clavicles. After radical dissection of the nodes of neck and mediastinal nodes, and wedge resection of both anterior segments of lung, and partial resection of both clavicle tips and total sternum. The both innominate veins and superior vena cava were partially obstructed by invaded cancer SVC reconstruction was done with preclotted 10$\times$ 10$\times$ 18mm Y shap d woven Dacron graft, which was anastomosed to the point of the junction of subclavian vein and jugular vein after cross clamping both veins and 2cm above the pericardial junction with one arm clamp. After maintaining blood drainage to the SVC from the right side, left innominate vein was anastomosed with 4-0 Prolene continuous running suture. Bone cement was used for resected sternal portion and clavicular ends were fixed to postal portion with 18 Gauge wires. The patient was treated with radiation and chemotherapy after discharge, and there were no evidence of regrowing of the mass nor obstruction of the graft inspite of no antithrombotic therapy.

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하도 합류부의 수리학적 특성을 고려한 RMA2 모형 매개변수의 민감도 분석 (Sensitivity Analysis of RMA2 Model Parameter Variation with Hydraulic Characteristics of Stream Junction Area)

  • 안승섭;임동희;서명준;이효정
    • 한국환경과학회지
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    • 제17권7호
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    • pp.783-793
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    • 2008
  • The purpose of this study is to analyze the sensitivity of the RMA2 model parameters reflecting the flow characteristics of stream junction and thus understand the hydraulic characteristics of the channel confluence flow. This study dealt with the input parameters of the RMA-2 model, a two-dimensional numerical analysis model widely used for researches both at home and abroad. The parameters of the RMA-2 model are roughness coefficient, turbulent diffusion coefficient, Coriolis forces latitude, Density, and mesh size. This study those parameters estimated from actual heavy rainfall, and varied the parameter size by (-)30%${\sim}$+30% to review the characteristics of the flow characteristics of the channel section. Weobserved that when the ratio of the channel width was relatively small, the smaller the approaching angle was, the farther from the junctions became the generating place of the maximum flow velocity, however, when the ratio of the channel width was relatively large, the larger the approaching angle was, the farther the generating place of the maximum flow velocity from the junctions became. In particular, the distance between junctions and the place where the maximum flow velocity generated showed an absolute correlationover 90% of the relative channel width, but an inverse relationwas found when the distance to the place where the flow velocity generated was shortened as relative the channel width between the main channel and tributary increased.

$Hg_{1-x}Cd_{x}$Te photovoltaic 대형 적외선 감지 소자의 제작 (Fabrication of a Large-Area $Hg_{1-x}Cd_{x}$Te Photovoltaic Infrared Detector)

  • 정한;김관;이희철;김재묵
    • 전자공학회논문지A
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    • 제31A권2호
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    • pp.88-93
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    • 1994
  • We fabricated a large-scale photovoltaic device for detecting-3-5$\mu$m IR, by forming of n$^{+}$-p junction in the $Hg_{1-x}Cd_{x}$Te (MCT) layer which was grown by LPE on CdTe substrate. The composition x of the MCT epitaxial layer was 0.295 and the hole concentration was 1.3${\times}10^{13}/cm^{4}$. The n$^{+}$-p junction was formed by B+ implantation at 100 keV with a does 3${\times}10^{11}/cm^{2}. The n$^{+}$ region has a circular shape with 2.68mm diameter. The vacuum-evaporated ZnS with resistivity of 2${\times}10^{4}{\Omega}$cm is used as an insulating layer over the epitaxial layer. ZnS plays the role of the anti-reflection coating transmitting more than 90% of 3~5$\mu$m IR. For ohmic contacts, gole was used for p-MCT and indium was used for n$^{+}$-MCT. The fabrication took 5 photolithographic masks and all the processing temperatures of the MCT wafer were below 90$^{\circ}C$. The R,A of the fabricated devices was 7500${\Omega}cm^{2}$. The carrier lifetime of the devices was estimated 2.5ns. The junction was linearly-graded and the concentration slope was measured to be 1.7${\times}10^{17}/{\mu}m$. the normalized detectivity in 3~5$\mu$m IR was 1${\times}10^{11}cmHz^{12}$/W, which is sufficient for real application.

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XIC tools을 사용한 고온 초전도 Rapid Single Flux Quantum 1-bit A/D Converter의 Simulation과 회로 Layout (Simulations and Circuit Layouts of HTS Rapid Single Flux Quantum 1-bit A/D Converter by using XIC Tools)

  • 남두우;홍희송;정구락;강준희
    • 한국초전도저온공학회:학술대회논문집
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    • 한국초전도저온공학회 2002년도 학술대회 논문집
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    • pp.131-134
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    • 2002
  • In this work, we have developed a systematic way of utilizing the basic design tools for superconductive electronics. This include WRSPICE, XIC, margin program, and L-meter. Since the high performance analog-to- digital converter can be built with Rapid Single Flux Quantum (RSFQ) logic circuits the development of superconductive analog-to-digital converter has attracted a lot of interests as one of the most prospective area of the application of Josephson Junction technology. One of the main advantages in using Rapid Single Flux Quantum logic in the analog-to-digital converter is the low voltage output from the Josephson junction switching, and hence the high resolution. To design an 1-bit analog-digital converter, first we have used XIC tool to compose a circuit schematic, and then studied the operational principle of the circuit with WRSPICE tool. Through this process, we obtained the proper circuit diagram of an 1-bit analog-digital converter circuit. Based on this circuit we performed margin calculations of the designed circuits and optimized circuit parameters. The optimized circuit was laid out as a mask drawing. Inductance values of the circuit layout were calculated with L-meter. Circuit inductors were adjusted according to these calculations and the final layout was obtained.

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Digital Front-End Design에서의 반도체 특성 연구 및 방법론의 고찰 (Semiconductor Characteristics and Design Methodology in Digital Front-End Design)

  • 정태경;이장호
    • 한국정보통신학회논문지
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    • 제10권10호
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    • pp.1804-1809
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    • 2006
  • 본 고에서는 디지털 회로의 저 전력소모의 설계와 구현에 관련된 디지털 전대역 회로 설계를 통해서 전반적인 전력 소모의 방법론과 이의 특성을 고찰하고자 한다. 디지털 집적회로의 설계는 광대하고 복잡한 영역이기에 우리는 이를 저전력 소모의 전반적인 회로 설계에 한정할 필요가 있다. 여기에는 로직회로의 합성과, 디지털 전대역 회로설계에 포함되어 있는 입력 clock 버퍼, 레치, 전압 Regulator, 그리고 케페시턴스와 전압기가 0.12 마이크론의 기술로 0.9V의 전압과 함께 쓰여져서 동적 그리고 정적 에너지 소모와 압력, 가속, Junction temperature 등을 모니터 할 수 있게 되어 있다.

AlGaAs/GaAs HBT의 DC 파라미터에 미치는 온도영향의 해석 (Analysis of temperature effects on DC parameters of AlGaAs/GaAs HBT)

  • 김득영;박재홍;송정근
    • 전자공학회논문지A
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    • 제33A권12호
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    • pp.39-46
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    • 1996
  • In AlGaAs/GaAs HBT the temperature dependence of DC parameters was investigated over the temperature range between 95K and 580K. The temperature dependence of DC parameters depends on the relative contribution of each of the current components suc as emitter-injection-current, base-injection-current, bulk recombination current, interface recombination curretn, thermal generation ecurrent and avalanche current due to impact ionization within the collector space charge layer in a specific temperature. In this paper we investigated the temperature effects on DC parameters such as V$_{BE,ON}$ current gain, input and output characteristics, V$_{CE, OFF}$, R$_{E}$, R$_{C}$ and analyzed the origins, and extracted the qualitativ econditions for a stable HBTs against the temperature variation. Finally, in order to keep HBTs stable with respect to the variation of temperature, the valance-band-energy-discontinuity at emitter-base heterojunction should be large enough to enhance the effect of carrier suppression at a relatively high temperature. In addition the recombination centers, especially around collector junction, should be removed and the area of emitter and collector junction should be identical as well.

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이중 이온주입 공정을 이용한 트렌치 필드링 설계 최적화 및 전기적 특성에 관한 연구 (The Research on Trench Etched Field Ring with Dual Ion-Implantation for Power Devices)

  • 양성민;오주현;배영석;성만영
    • 한국전기전자재료학회논문지
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    • 제23권5호
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    • pp.364-367
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    • 2010
  • The dual ion-implantation trench edge termination techniques were investigated and optimized using a two-dimensional device simulator. By trenching the field ring site which would be dual implanted, a better blocking capability can be obtained. The results show that the p-n junction with dual implanted junction field-ring can accomplish nearly 20% increase of breakdown voltage in comparison with the conventional trench field-rings. The fabrication is relatively difficult. But the trench etched field ring with dual ion-implantation is surpassed for breakdown voltage and consume same area and extensive device simulations as well as qualitative analysis confirm these conclusions.

원통으로 보강된 평판의 응력해석 (Stress analysis near a circular hole in a flat plate reinforced by a cylinder)

  • 정인승;이대희;이완익;윤갑영
    • 대한기계학회논문집
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    • 제11권5호
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    • pp.800-809
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    • 1987
  • 본 연구에서는 원통에 대하여는 Donnel 식과 Flugge식을 사용하여 원통의 유 한길이에 대한 일반적인 해를 구하였고, 평판에 대하여는 막이론과 굽힘이론을 사용하 여 일반해를 구한 후 중첩하였다. 평판과 원통에 발생하는 미정력계를 구하기 위하 여 가장 합리적이라고 생각되는 접합부에 모든 미정력계가 집중하여 작용한다고 가정 하고, 이 부분에서 평판과 원통의 각각에 대한 하중, 모우멘트, 기울기, 변위 등이 연 속하도록 접한조건식을 세웠다.그리고 이론해석의 타당성을 알아보기 위하여 S 45C 강재로 플러시타잎의 모델을 제작하여 실험을 행하였다.