• Proceedings of the Materials Research Society of Korea Conference
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• 2002.05a
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• pp.33-33
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• 2002

• Proceeding of EDISON Challenge
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• 2013.04a
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• pp.179-191
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• 2013

NPT ensemble을 이용하여 Joule-Thomson 반전 곡선 (Joule-Thomson inversion curve, JTIC)를 구하는 기존의 모의실험 방법들과는 달리, 본 연구에서는 NVT 분자동역학 모의실험을 이용하여 JTIC를 구하는 방법을 개발하고, 이 방법을 이용하여 아르곤 기체의 JTIC를 구할 수 있음을 보인다. 본 연구 결과를 실험 및 다른 이론들과 비교, 분석한 결과, 낮은 온도에서의 JTIC는 실험 및 이론 결과와 유사한 반면, 높은 온도에서는 일정 정도의 차이를 나타냄을 알 수 있다. 이 차이는 분자동역학 모의실험에 사용하는 적은 입자 수와 모의실험 시간, 그리고 curve fitting 방법 등에 기인하는 것으로 여겨진다. 또한 본 연구를 통하여 NVT 분자동역학 모의실험 방법만 가능한, EDISON 계산화학 프로그램 중 하나인 "Mixed LJ(12-6) particles MD"가 JTIC를 구하는데 유용하게 사용될 수 있고, 이를 통해 학부생들이 열역학의 기본 개념을 이해하는데 도움을 줄 것으로 기대한다.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.33 no.10
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• pp.820-826
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• 2009

The anisotropic phonon conductions with varying Joule heating rate of the silicon film in Silicon-on-Insulator devices are examined using the electron-phonon interaction model. It is found that the phonon heat transfer rate at each boundary of Si-layer has a strong dependence on the heating power rate. And the phonon flow decreases when the temperature gradient has a sharp change within extremely short length scales such as phonon mean free path. Thus the heat generated in the hot spot region is removed primarily by heat conduction through Si-layer at the higher Joule heating level and the phonon nonlocality is mainly attributed to lower group velocity phonons as remarkably dissimilar to the case of electrons in laser heated plasmas. To validate these observations the modified phonon nonlocal model considering complete phonon dispersion relations is introduced as a correct form of the conventional theory. We also reveal that the relation between the phonon heat deposition time from the hot spot region and the relaxation time in Si-layer can be used to estimate the intrinsic thermal resistance in the parallel heat flow direction as Joule heating level varies.

• Proceedings of the KSME Conference
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• 2005.11a
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• pp.11.1-11.1
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• 2005

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2007.06a
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• pp.677-678
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• 2007

• Journal of the Korean institute of surface engineering
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• v.46 no.4
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• pp.162-167
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• 2013

Encapsulation is required since organic materials used in OLED devices are fragile to water vapor and oxygen. Laser sealing method is currently used where IR laser is scanned along the glass-frit coated lines. Laser method is, however, not suitable to encapsulating large-sized glass substrate due to the nature of sequential scanning. In this work we propose a new method of encapsulation using Joule heating. Conductive layer is patterned along the sealing lines on which the glass frit is screen printed and sintered. Electric field is then applied to the conductive layer resulting in bonding both the panel glass and the encapsulation glass by melting glass-frit. In order to obtain uniform bonding the temperature of a conductive layer having a shape of closed loop should be uniform. In this work we conducted simulation for heat distribution according to the structure of a conductive layer used as a Joule-heat source. Uniform temperature was obtained with an error of 5% by optimizing the structure of a conductive layer. Based on the results of thermal simulations we concluded that Joule-heating induced encapsulation would be a good candidate for encapsulation method especially for large area glass substrate.

• Korean Journal of Materials Research
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• v.9 no.11
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• pp.1108-1111
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• 1999

The Peltier heat absorbed or evolved at the solidiliquid interface in the unidirectional solidification process could contribute to the increase of temperature gradient in liquid and growth velocity, and the enhancement of crystal orientation. In this study, in order to measure the Peltier heat generated at the solidiliquid interface as a way of application to crystal growth, the thermoelectric effects were investigated on the temperature changes at the solid- and liquid-phase of the same material and its interface. Through the theoretical consideration, it was possible to separate sole Peltier. Thomson or Joule heat from the temperature changes due to current density, polarity, and temperature gradient. Thomson coefficient of solid- and liquid-phase as well as Peltier coefficient at the solid/liquid interface could be obtained.

• Transactions of the Korean Society of Mechanical Engineers
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• v.16 no.11
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• pp.2196-2202
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• 1992

The optimum size combination of heat exchangers in a Joule-Thomson(J-T) circuit for small cryogenic systems has been sought analytically, when the circuit is combined with a two-stage Gifford-McMahon(GM) cooler. Full thermodynamic cycle analysis was carried out to predict the performance of the combined refrigeration system. Relevant convective heat transfer coefficients, the computerized properties of helium, and the refrigeration capacity curve of a typical GM cooler have been used in the analysis. The result showed that, by changing the configuration(heat exchanger area ratio) of the system, the performance of the commonly-used GM/J-T refrigerators could be optimized. For the maximum refrigeration performance, the optimum mass flow rate of the refrigerant and the relative size between the heat exchangers have been obtained, when the cooling load was 0.1W at 3.995K with the total heat exchanger area being given.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.33 no.10
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• pp.797-802
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• 2009

Large area crystallization of amorphous silicon thin-films on glass substrates is one of key technologies in manufacturing flat displays. Among various crystallization technologies, the Joule induced crystallization (JIC) is considered as the highly promising one in the OLED fabrication industries, since the amorphous silicon films on the glass can be crystallized within tens of microseconds, minimizing the thermally and structurally harmful influence on the glass. In the JIC process the metallic layers can be utilized to heat up the amorphous silicon thin films beyond the melting temperatures of silicon and can be fabricated as electrodes in OLED devices during the subsequent processes. This numerical study investigates the heating mechanisms during the JIC process and estimates the deformation of the glass substrate. Based on the thermal analysis, we can understand the temporal and spatial temperature fields of the backplane and its warping phenomena.

• Korean Journal of Materials Research
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• v.17 no.2
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• pp.91-95
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• 2007

Electromigration characteristics of Sn-3.5Ag flip chip solder bump were analyzed using flip chip packages which consisted of Si chip substrate and electroplated Cu under bump metallurgy. Electromigration test temperatures and current densities peformed were $140{\sim}175^{\circ}C\;and\;6{\sim}9{\times}10^4A/cm^2$ respectively. Mean time to failure of solder bump decreased as the temperature and current density increased. The activation energy and current density exponent were found to be 1.63 eV and 4.6, respectively. The activation energy and current density exponent have very high value because of high Joule heating. Evolution of Cu-Sn intermetallic compound was also investigated with respect to current density conditions.