• Journal of Power Electronics
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• v.12 no.4
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• pp.595-603
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• 2012

This paper presents a full digital control strategy for parallel connected modular inverter systems. Each modular inverter is a high frequency (HF) AC link inverter which is composed of a HF inverter and a HF transformer followed by a cycloconverter. To achieve equal sharing of the load current and to suppress the circulating currents among the modules, a three-loop control strategy, consisting of a common output voltage regulation (OVR) loop, individual circulating current suppression (CCS) loops and individual inner current tracking (ICT) loops, is proposed. The ICT loops are implemented with predictive current control from which high precision current tracking can be obtained. The effectiveness of the proposed control strategy is verified by simulation and experimental results from parallel connected two full-bridge HF AC link inverter modules.

• Journal of Power Electronics
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• v.12 no.4
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• pp.632-642
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• 2012

This paper presents a filter analysis of conducted Electro-Magnetic Interference (EMI) in switching power converters (SPC) based on noise impedances. The EMI characteristics of SPC can be analytically deduced from a circuit theoretical viewpoint. The analytical noise model is investigated to get a full understanding of the EMI mechanism. It is shown that with suitable and justified model, filters pertinent to EMI noise is investigated. The EMI noise is identified by time domain measurements associated with an isolated half-bridge ac-dc converter. Practical filters like LC filter, ${\pi}$ filter and complete EMI filters are investigated. The proposed analysis and results can provide a guideline for improving the effectiveness of filtering schemes in SPC. Experimental results are also included to verify the validity of the proposed method. The results obtained satisfy the Federal Communications Commission (FCC) class A and class B regulations.

• Journal of Power Electronics
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• v.12 no.4
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• pp.643-653
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• 2012

An interleaved DC/DC converter with series-connected transformers is presented to implement the features of zero voltage switching (ZVS), load current sharing and ripple current reduction. The proposed converter includes two half-bridge converter cells connected in series to reduce the voltage stress of the switches at one-half of the input voltage. The output sides of the two converter cells with interleaved pulse-width modulation are connected in parallel to reduce the ripple current at the output capacitor and to achieve load current sharing. Therefore, the size of the output chokes and the capacitor can be reduced. The output capacitances of the MOSFETs and the resonant inductances are resonant at the transition instant to achieve ZVS turn-on. In addition, the switching losses on the power switches are reduced. Finally, experiments on a laboratory prototype (24V/40A) are provided to demonstrate the performance of the proposed converter.

• Journal of Power Electronics
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• v.14 no.6
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• pp.1281-1292
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• 2014

Photovoltaic (PV) solar systems with series-connected module integrated converters (MICs) are receiving increased attention because of their ability to create high output voltage while performing local maximum power point tracking (MPPT) control for individual solar panels, which is a solution for partial shading effects in PV systems at panel level. To eliminate the partial shading effects in PV system more effectively, sub-MICs are utilized at the cell level or grouped cell level within a PV solar panel. This study presents the results of a series-output-connection MPPT (SOC-MPPT) controller for sub-MIC architecture using a single sensor at the output and a single digital MPPT controller (sub-MIC SOC-MPPT controller and architecture). The sub-MIC SOC-MPPT controller and architecture are investigated based on boost type sub-MICs. Experimental results under steady-state and transient conditions are presented to verify the performance of the controller and the effectiveness of the architecture.

• Journal of Power Electronics
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• v.14 no.6
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• pp.1130-1138
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• 2014

This study analyzes a ladder multilevel converter (double ladder topology) with the use of a new averaging modeling technique. This technique introduces an analytical method to compute for the switching losses and is used to conduct an in-depth analysis of the influence of the switching frequency and parasitic resistance of components on converter efficiency. The obtained results enable the selection of switches and switching frequency to minimize losses. Moreover, simulation results and experimental measurements validate the analytical calculations.

• Journal of Power Electronics
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• v.14 no.6
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• pp.1263-1271
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• 2014

A novel hysteresis PWM control strategy for synchronous buck converter is proposed. The proposed control strategy is based on ampere-second balance of the modulate capacitor, which not only offers faster transient response to meet the challenges of the power supply requirements of fast dynamic load changes, but also provides better stability and solves the compensation problem of error amplifier in the conversional voltage PWM control. Finally, the steady-state and dynamic operation of the control method is analyzed and verified by simulation and experimental results.

• Journal of Power Electronics
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• v.14 no.6
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• pp.1272-1280
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• 2014

This paper presents solutions for fault detection and diagnosis of two-level, three phase voltage-source inverter (VSI) topologies with IGBT devices. The proposed solutions combine redundant standby VSI structures and contactors (or relays) to improve the fault-tolerant capabilities of power electronics in applications with safety requirements. The suitable combination of these elements gives the inverter the ability to maintain energy processing in the occurrence of several failure modes, including short-circuit in IGBT devices, thus extending its reliability and availability. A survey of previously developed fault-tolerant VSI structures and several aspects of failure modes, detection and isolation mechanisms within VSI is first discussed. Hardware solutions for the protection of power semiconductors with fault detection and diagnosis mechanisms are then proposed to provide conditions to isolate and replace damaged power devices (or branches) in real time. Experimental results from a prototype are included to validate the proposed solutions.

• Journal of Power Electronics
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• v.14 no.6
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• pp.1224-1232
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• 2014

A full-bridge secondary dual-resonant DC-DC converter using the asymmetrical pulse-width modulated (APWM) strategy is proposed in this paper. The proposed converter achieves zero-voltage switching for the power switches and zero-current switching for the rectifier diodes in the whole load range without the help of any auxiliary circuit. Given the use of the APWM strategy, a circulating current that exists in a traditional phase-shift full-bridge converter is eliminated. The voltage stress of secondary rectifier diodes in the proposed converter is also clamped to the output voltage. Thus, the existing voltage oscillation of diodes in traditional PSFB converters is eliminated. This paper presents the circuit configuration of the proposed converter and analyzes its operating principle. Experimental results of a 1 kW 385 V/48 V prototype are presented to verify the analysis results of the proposed converter.

• Journal of Power Electronics
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• v.14 no.6
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• pp.1233-1242
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• 2014

A new inverter topology for single-phase photovoltaic (PV) systems is proposed in this study. The proposed inverter offers a four-level voltage in its output terminals. This feature results in easier filtering in comparison with other conventional two-level or three-level inverters. In addition, the proposed four-level inverter (PFLI) has a transformer-less topology, which decreases the size, weight, and cost of the entire system and increases the overall efficiency of the system. Although the inverter is transformer-less, it produces a negligible leakage ground current (LGC), which makes this inverter suitable for PV grid-connected applications. The performance of the proposed inverter is compared with that of a four-level neutral point clamped inverter (FLNPCI). Theoretical analysis and computer simulations verify that the PFLI topology is superior to FLNPCI in terms of efficiency and suitability for use in PV transformer-less systems.

• Journal of Power Electronics
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• v.14 no.6
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• pp.1189-1196
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• 2014

A modular multilevel-clamped composited multilevel converter ($M-MC^2$) is proposed. $M-MC^2$ enables topology reconfiguration, power device reuse, and composited clamping. An advanced five-level converter ($5L-M-MC^2$) is derived from the concept of $M-MC^2$. $5L-M-MC^2$ integrates dual three-level T-type modules and one three-level neutral point clamped module. This converter can also integrate dual three-level T-type modules and one passive diode module by utilizing the device reuse scheme. The operation principle and SPWM modulation are discussed to highlight converter performance. The proposed $M-MC^2$ is comprehensively compared with state-of-the-art five-level converters. Finally, simulations and experimental results are presented to validate the effectiveness of the main contributions of this study.