• Journal of the Korean earth science society
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• v.36 no.7
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• pp.617-631
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• 2015

The Sesong Formation, mixed carbonate-siliciclastic deposits of late Middle Cambrian (Series 3) to Furongian in age, in the Taebaeksan Basin shows the Steptoean Positive Carbon Isotope Excursion (SPICE) with the ${\delta}^{13}C$ values ranging from 1.14 to 2.81‰ in the approximately 15-m-thick stratigraphic interval. The SPICE in the Sesong Formation occurs in the lower part of the Paibian Stage which contains trilobite biozones of the Fenghuangella laevis Zone, Prochuangia mansuyi Zone and the lower part of the Chuangia Zone. The Sesong Formation is composed of six lithofacies including laminated mudstone, nodular shale, laminated sandstone, massive sandstone, limestone conglomerate, and limestone-shale couplet facies. The Sesong Formation is known to have been deposited in the outer shelf below storm wave base. The SPICE occurs in the stratigraphic interval associated with highstand systems tract, correlative conformity and transgressive systems tract of the Sesong Formation. The peak carbon isotope value in the SPICE may coincide with the correlative conformity formed by relative sea-level fall. The occurrence of the SPICE in the Sesong Formation suggests that the SPICE can be used as a tool of global correlation for the successions of mixed carbonate-siliciclastics which lack fossils.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.5
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• pp.347-352
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• 1998

In this paper, the extraction and optimization of SPICE parameters on SONOSFET for NVSM circuit design were discussed. SONOSFET devices with different channel widths and lengths were fabricated using conventional 1.2 um n-well CMOS process. And, electric properties for dc parameters and capacitance parameters were measured on wafer. SPICE parameters for the SONOSFET were extracted from the UC Berkeley level 3 model for the MOSFET. And, local optimization of Ids-Vgs curves has carried out in the bias region of subthreshold, linear, saturation respectively. Finally, the extracted SPICE parameters were optimized globally by comparing drain current (Ids), output conductance(gds), transconductance(gm) curves with theoretical curves in whole region of bias conditions. It is shown that the conventional model for the MOSFET can be applied to the SONOSFET modeling except sidewalk effect.

• Journal of the Semiconductor & Display Technology
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• v.16 no.3
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• pp.71-77
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• 2017

As the automobile industry has shifted to software, the Automotive SPICE standard has been established to ensure efficient product development process and quality. In the assessment model, the HIS Scope is the minimum standard for small and medium automotive electric companies to meet OEM requirements. However, in order to achieve the HIS Scope, the output of each process stage that meets the verification criteria of Automotive SPICE must be created. In particular, the test phase takes a lot of resources, which is a big burden for small and medium-sized companies. In this paper, we propose a methodology for creating test cases of software integration test phase based on UML sequence diagram, which is a software design phase of Automotive SPICE HIS Scope, by applying behavior model based testing method. We also propose a tool chain for automating the creation process. This will reduce the resources required to create a test case.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.7
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• pp.560-565
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• 2018

The SPICE (Sparse Iterative Covariance-based Estimation) algorithm estimates the azimuth angle by applying a sparse recovery method to the covariance matrix in the time domain. In this paper, we show how the SPICE algorithm, which was originally formulated in the time domain, can be extended to the frequency domain. Furthermore, we demonstrate, through numerical results, that the performance of the proposed algorithm is superior to that of the conventional frequency domain algorithm.

• Journal of the Microelectronics and Packaging Society
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• v.12 no.1 s.34
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• pp.59-63
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• 2005

A simulation method combined with the simulation program with integrated circuit emphasis (SPICE) and the technology computer-aided design (TCAD) has been proposed to estimate the electrical characteristics of the metal-ferroelectric-semiconductor field effect transistor (MFS/MFISFET). The complex behavior of the ferroelectric property was analyzed and surface potential of the channel region in the MFS gate structure was calculated with the numerical TCAD method. Since the calculated surface potential is equivalent with the surface potential obtained with the SPICE model of the conventional MOSFET, we can obtain the current-voltage characteristics of MFS/MFISFET corresponding to the applied gate bias. Therefore, the proposed method will be very useful for the design of the integrated circuits with MFS/MFISFET memory cell devices.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.10
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• pp.11-16
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• 2000

The SPICE model of the spiral inductor on silicon substrate which can be easily used for the RF IC design has been developed. In this proposed model the equivalent circuit element of the spiral inductor are defined by the layout and process parameters using the user-defined function and subcircuit of the SPICE. The total inductance is calculated using the subcircuit Li for the arbitrary turn i and the subcircuit Mij for two arbitrary turns. The model was verified by comparing the simulated data with the measured s-parameters, total inductance, and quality factor of the spiral inductor fabricated by the CMOS 0.8${\mu}m$ process. The proposed SPICE model of the spiral inductor is scalable and includes the effects of the silicon substrate.

• Proceedings of the Korea Society for Industrial Systems Conference
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• 1999.12a
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• pp.675-690
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• 1999

This study is to answer the following three questions: (1) What is SPICE? (2) Is it flexible enough to be applied to the small projects such as the ones owned by local companies and government agencies. The standards and models which comprise SPICE (Software Process Improvement and Capability dEtermination) or IS0/IEC 15504 were thoroughly reviewed first Based on the standards, we developed a methodology for the assessment of software processes was developed. Then the methodology is applied for the assessment for three projects in Kwangju area. For this experiment, a university, a district office, and a IT company were selected. Both the development application of the methodology was considered to be successful. As we go through the assessment, we can be convinced that the foundation of the SPICE is very sound. As we stick to the principles of SPICE, the assessment methodology that we developed worked well. The study suggests several implications for the policy making.

• Proceedings of the KIEE Conference
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• 1990.07a
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• pp.387-392
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• 1990

In this papers, SPICE which is widely used in analysis of general circuit and simulation in electric and electrical field is applied to DC-DC converter. Be selected Forward which is widely used as SMPS(Switched Mode Power Supply) amang DC-DC converter, and showed the aveformer, we know that the converter is operated in normal. Including the control circuit in converter, by controlling the duty ratio of switch, we know that the output voltages is staple from the transient state of convwrter. Also, comparing SPICE simulation with experiment, the validity of simulate is showed.

• Journal of KIISE:Computing Practices and Letters
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• v.8 no.2
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• pp.141-154
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• 2002

More efforts have been given to solve the problems related to computer software by process assessment. ISO/IEC 15504(SPICE) has been developed as standardized means for process assessment. The purpose of this paper is to design and implement a process assessment system which is appropriated to the Korean assessment environment based on ISO/IEC 15504. Referring documents are: IS0/1EC 15504 standardized documents, the assessment provisions of the SPICE committee in Korea, and research papers applied the existing process assessment system to real cases. Among a lot of processes, this system is designed for (ENG2). The proposed system in the paper will support the whole process of assessment, presenting the goals and end-products for each assessment step and making it possible to compose and save the product on the same screen. In determining process rating, assessors can retrieve the saved data and documents. By doing so, the system will improve reliability in process rating. The proposed system includes 7 steps of pre-assessment and 9 steps of actual assessment in order to fully prepare assessors for process assessment. And each step has been standardized to improve user-friendliness. This system is designed to provide assessors with specific details of standardized documents, the goals of the process, outcomes of implementing the process, and presentations of base practices and input/output products. Above all, the system automatically generates an assessment rating, by calculating based on input data which assessors make out. It also presents outcomes graphically.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.2
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• pp.92-97
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• 2013

In this paper the author proposes a method of implementing a numerical model for threshold voltage ($V_{th}$) shift in organic thin-film transistors (OTFTs) into SPICE tools. $V_{th}$ shift is first numerically modeled by dividing the shift into sequentially ordered groups. The model is then used to derive a simulations model which takes into simulation parameters and calculation complexity. Finally, the numerical and simulation models are implemented in AIM-SPICE. The SPICE simulation results agree well with the $V_{th}$ shift obtained from an OTFT fabricated without any optimization. The proposed method is also used to implement the stretched-exponential time dependent $V_{th}$ shift in AIM-SPICE and the results show the proposed method is applicable to various types of $V_{th}$ shifts.