• Title/Summary/Keyword: Inverter noise

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Design of Sensorless Controller for Interior Permanent-Magnet BLDC Motor (영구 자석 매립형 BLDC Motor의 Sensorless 제어기 설계)

  • Kim, Hag-Wone;Yeum, Kwan-Ho;Cho, Kwan-Youl;Ahn, Jun-Ho;Shin, Hyoun-Jeong;Byun, Il-Soo;Kim, Jung-Chul
    • Proceedings of the KIEE Conference
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    • 1996.11a
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    • pp.299-301
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    • 1996
  • Recently, as a result of the progress in power electronics and magnet technology, the applications of inverter fed BLDC Motor have increased for industry and home appliance. Also because of the high efficiency, good acoustic noise characteristic, BLDC Motor applications are growing. However, BLDC Motor requires position sensor, which has many problems such as high cost, more space and difficult to install. Therefore, sensorless control algorithm is being studied. In this paper, sensorless algorithm for interior permanent magnet BLOC motor adaptable for home appliance is proposed. The maximum torque per amp operation with advance angle considering load torque and speed was simulated and verified through the experiment.

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Technique of Common Mode Voltage and Conducted EMI Reduction using Nonzero-vector State in SVPWM Method (SVPWM방식에서의 영벡터 제거에 의한 커먼모드 전압 및 전도성 EMI 저감 기법)

  • Hahm Nyon-Kun;Kim Lee-Hun;Jeon Kee-Young;Chun Kwang-Su;Won Chung-Yuen;Han Kyung-Hee
    • The Transactions of the Korean Institute of Power Electronics
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    • v.9 no.5
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    • pp.507-515
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    • 2004
  • With the advent of fast power devices, the high dv/dt voltage produced by PWM inverts have been found to cause EMI noise, shaft voltage and bearing current. This paper describes the application of newly developed Conducted EMI reduction SVPWM technique in induction motor drives. The newly developed common mode voltage reduction SVPWM technique don't use any zero-vector states for inverter control, hence it can restrict the common mode voltage more than conventional PWM technique. The validity of the proposed technique by software approach is verified through simulation and experimental results.

High-Pass-Filter-Based Virtual Impedance Control for LCL-filtered Inverters Under Weak Grid

  • Wang, Jiangfeng;Xing, Yan;Zhang, Li;Hu, Haibing;Yang, Tianyu;Lu, Daorong
    • Journal of Power Electronics
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    • v.18 no.6
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    • pp.1780-1790
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    • 2018
  • Voltage feed-forward control (VFFC) is widely used in LCL-type grid-tied inverters due to its advantages in terms of disturbance rejection performance and fast dynamic response. However, VFFC may worsen the stability of inverters under weak grid conditions. It is revealed in this paper that a large phase-lag in the low-frequency range is introduced by VFFC, which reduces the phase margin significantly and leads to instability. To address this problem, a novel virtual-impedance-based control, where a phase-lead is introduced into the low-frequency area to compensate for the phase lag caused by VFFC, is proposed to improve system stability. The proposed control is realized with a high-pass filter, without high-order-derivative components. It features easy implementation and good noise immunity. A detailed design procedure for the virtual impedance control is presented. Both theoretical analysis and experimental results verify the effectiveness of the control proposed.

A Study on the Performance Analysis of Photovoltaic System with Digital Surge Detection device

  • Byeong-Ho Jeong;Ju-Hoon Park
    • International journal of advanced smart convergence
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    • v.13 no.3
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    • pp.376-387
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    • 2024
  • This paper examines the performance improvement of a photovoltaic power generation system with a surge protection function by applying a digital surge detection device for surge suppression in a direct current distribution panel applied to a photovoltaic power generation system. The main components used for surge protection are mainly SAD, MOV, and GTA components, and a digital surge detection device was additionally applied to this. Each component has advantages and disadvantages in terms of performance and functionality for surge protection, so a surge protection device with meaningful performance and functionality must be designed in a complex device structure that harmonizes the advantages and disadvantages of each component in order to construct a surge protection device with meaningful performance and function. Through empirical experiments, a performance analysis of a complex surge detection device to which a digital surge detection device is applied was conducted. As a result of the experiment, through absorption and blocking of surges detected through a digital surge detection device, it has both absorption and blocking performance for surges and exhibits surge absorption characteristics for hundreds of voltages in micro second. This performance showed a relatively stable state against surge noise compared to conventional devices, which produced an output waveform of stable quality in the inverter output waveform.

A Design of 0.357 ps Resolution and 200 ps Input Range 2-step Time-to-Digital Converter (0.357 ps의 해상도와 200 ps의 입력 범위를 가진 2단계 시간-디지털 변환기의 설계)

  • Park, An-Soo;Park, Joon-Sung;Pu, Young-Gun;Hur, Jeong;Lee, Kang-Yoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.5
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    • pp.87-93
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    • 2010
  • This paper presents a high resolution, wide input range 2-step time-to-digital converter used in digital PLL. TDC is used to compare the DPLL output frequency with reference frequency and should be implemented with high resolution to improve the phase noise of DPLL. The conventional TDC consists of delay line realized inverters, whose resolution is determined by delay time of inverter and transistor size, resulting in limited resolution. In this paper, 2-step TDC with phase-interpolation and Time Amplifier is proposed to meet the high resolution and wide input range by implement the delay time less than an inverter delay. The gain of Time Amplifier is improved by using the delay time difference between two inverters. It is implemented in $0.13{\mu}m$ CMOS process and the die area is $800{\mu}m{\times}850{\mu}m$ Current consumption is 12 mA at the supply voltage of 1.2 V. The resolution and input range of the proposed TDC are 0.357 ps and 200 ps, respectively.

Dead Time Compensation and Polarity Check of Phase Currents Based on Programmable Low-pass Filter for Automotive Electric Drive Systems (자동차 전동 시스템을 위한 Programmable 저역 통과 필터 기반의 상전류 극성 판단 및 데드타임 보상)

  • Choi, Chinchul;Lee, Kangseok;Lee, Wootaik
    • Transactions of the Korean Society of Automotive Engineers
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    • v.22 no.6
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    • pp.23-30
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    • 2014
  • This paper proposes a dead time compensation method for an AC motor drive using phase current polarity information which is detected based on a digital programmable low-pass filter (PLPF). The polarity detection using the PLPF is an alternative solution of a conventional method which uses a general low-pass filter (LPF) and hysteresis bands in order to avoid jittering due to noises. The PLPF not only adjusts its cutoff frequency according to the synchronous frequency of AC motors but also eliminates a gain attenuation and phase delay which are main problems of the general LPF. Through the PLPF, a fundamental component signal without gain and phase distortions is extracted from the measured raw current signal with noise. By use of the fundamental component, the polarity of current is effectively detected by reducing the hysteresis band. Finally, the proposed method compensates the dead time effects by adding or subtracting average voltage value to voltage references of the controller according to the detected current polarity information. The proposed compensation method is experimentally verified by compared with the conventional method.

High-Mobility Ambipolar Polymer Semiconductors by Incorporation of Ionic Additives for Organic Field-Effect Transistors and Printed Electronic Circuits (이온성 첨가제 도입을 통한 고이동도 고분자 반도체 특성 구현과 유기전계효과트랜지스터 및 유연전자회로 응용 연구)

  • Lee, Dong-Hyeon;Moon, Ji-Hoon;Park, Jun-Gu;Jung, Ji Yun;Cho, Il-Young;Kim, Dong Eun;Baeg, Kang-Jun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.31 no.3
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    • pp.129-134
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    • 2018
  • Herein, we report the manufacture of high-performance, ambipolar organic field-effect transistors (OFETs) and complementary-like electronic circuitry based on a blended, polymeric, semiconducting film. Relatively high and well-balanced electron and hole mobilities were achieved by incorporating a small amount of ionic additives. The equivalent P-channel and N-channel properties of the ambipolar OFETs enabled the manufacture of complementary-like inverter circuits with a near-ideal switching point, high gain, and good noise margins, via a simple blanket spin-coating process with no additional patterning of each active P-type and N-type semiconductor layer.

Parallel Operation Characteristics of Utility Interactive Photovoltaic System and Revolving Field Type Synchronous Generator (계통연계 태양광발전시스템과 회전계자형 동기발전기의 병렬운전 특성)

  • Ryu, Yeon-Soo;Yoo, Wang-Jin;Lee, Checl-Gyu;Moon, Jong-Beom
    • 한국태양에너지학회:학술대회논문집
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    • 2008.04a
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    • pp.43-48
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    • 2008
  • Through simulations and field experiment on A.C. parallel operation of both Utility Interactive Photovoltaic System and Diesel Engine Revolving Field Type Synchronous Generator, following factors have been found. First, the inverter should be operated in three modes of frequency(mode.1: ${\pm}$0.3Hz, mode.2: ${\pm}$1Hz, mode.3: ${\pm}$2Hz) as default, considering properties of operating Synchronous Generator. Second, as a result of supplying 13.5kW of residual power, it has been found that Synchronous Generator takes the power input only as reactive power, because it was electrically stable with frequency of 60.14Hz and high voltage of 222.3V even when power factor was -0.94. Besides, it was mechanically stable, too, because the quake, noise, and temperature of Synchronous Generator in this case were 7.5mm/s, 97dB, and $6^{\circ}C$ respectively, which were lower than normal load connection of 145.6kW; 11.03mm/s. Thus, load share of Revolving Field Type Synchronous Generator reduces according to the supply of Photovoltaic System to the load power. In this experiment, 200kW of Synchronous Generator and 40kW of Photovoltaic System were operated in parallel. The load share was 20% in maximum. and 11.1lit/hr of fuel was saved.

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High-Speed Digital/Analog NDR ICs Based on InP RTD/HBT Technology

  • Kim, Cheol-Ho;Jeong, Yong-Sik;Kim, Tae-Ho;Choi, Sun-Kyu;Yang, Kyoung-Hoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.6 no.3
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    • pp.154-161
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    • 2006
  • This paper describes the new types of ngative differential resistance (NDR) IC applications which use a monolithic quantum-effect device technology based on the RTD/HBT heterostructure design. As a digital IC, a low-power/high-speed MOBILE (MOnostable-BIstable transition Logic Element)-based D-flip flop IC operating in a non-return-to-zero (NRZ) mode is proposed and developed. The fabricated NRZ MOBILE D-flip flop shows high speed operation up to 34 Gb/s which is the highest speed to our knowledge as a MOBILE NRZ D-flip flop, implemented by the RTD/HBT technology. As an analog IC, a 14.75 GHz RTD/HBT differential-mode voltage-controlled oscillator (VCO) with extremely low power consumption and good phase noise characteristics is designed and fabricated. The VCO shows the low dc power consumption of 0.62 mW and good F.O.M of -185 dBc/Hz. Moreover, a high-speed CML-type multi-functional logic, which operates different logic function such as inverter, NAND, NOR, AND and OR in a circuit, is proposed and designed. The operation of the proposed CML-type multi-functional logic gate is simulated up to 30 Gb/s. These results indicate the potential of the RTD based ICs for high speed digital/analog applications.

Maximum Torque Operation of IPMSM Drives for the Next Generation High Speed Railway System (차세대 고속전철에 적용되는 IPMSM 구동 시스템의 최대 토크제어)

  • Jin, Kang-Hwan;Kim, Sung-Je;Yi, Du-Hee;Kwon, Soon-Hwan;Kim, Yoon-Ho
    • Journal of the Korean Society for Railway
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    • v.13 no.5
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    • pp.493-499
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    • 2010
  • The next generation domestic high speed railway system is a power dispersed type and uses vector control method for motor speed control. Nowadays, inverter driven induction motor system is widely used. However, recently PMSM drives are deeply considered as a alternative candidate instead of an induction motor driven system due to their advantages in efficiency, noise reduction and maintenance. In this paper, the maximum torque control approach is presented for the IPMSM drives with reluctance torque. The applied control method uses maximum torque control per ampere technique. Simulation programs based on Matlab/Simulink are developed. Finally the designed system is verified by simulation and their characteristics are analyzed by the simulation results.