• 제목/요약/키워드: Inverter design

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제어기 성능을 고려한 전압형 인버터의 출력 LC필터 설계 (Output LC Filter Design of Voltage Source Inverter Considering the Performance of Controller)

  • 민완기;김재식;최재호
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2005년도 학술대회 논문집 전문대학교육위원
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    • pp.206-211
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    • 2005
  • The LC filter design procedure of the inverter output filter is described. The transfer function of the filter output voltage to the load current is described with the capacitor value and the system time constant considering the system controller. By using the closed form of the relation between the filter capacitor value and the system time constant, the capacitor value can be calculated with the given system time constant and vice versa. It is more practical for the implementation of power and control circuit of inverter. And as the effect of the load current to the voltage distortion can be calculated from the closed form, it is possible to analyze the system how much the voltage waveform is distorted in case of the nonlinear load. All the proposed design procedure is verified with the simulation and experimental results.

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직렬형 멀티레벨 인버터를 사용한 무효전력보상장치의 수동 파라메타 설계 (Design of Passive Parameters for A Cascade Multilevel Inverter Based Static Var Compensator)

  • 민완기;민준기;최재호
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2002년도 학술대회 논문집 전문대학교육위원
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    • pp.125-130
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    • 2002
  • This paper examines the application of high voltage static var compensator(SVC) with cascade multilevel inverter which employs H~bridge inverter(HBI). The SVC system is modeled using the d-q transform which calculates the instantaneous reactive power. This model is used to design a controller and analyze the SVC system. From the mathematical model of the system, the design procedures of the circuit parameters Land C are presented in this thesis. To meet the specific total harmonic distortion(THD) and ripple factor of the capacitor voltage, the circuit parameters Land C are designed. Simulated and experimental results are also presented and discussed to validate the proposed schemes.

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새로운 Clocking 방식에 의한 Voltage Inverter Switch 및 Switched Capacitor Filter 설계에의 응용 (A Voltage Inverter Switch With a New Clocking Scheme and its Application to Switched Capacitor Filter Design)

  • 이방원;박송배
    • 대한전자공학회논문지
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    • 제18권4호
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    • pp.1-11
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    • 1981
  • 본 논문에서는 VIS (voltage inverter switch)를 사용한 SCF(switched capacitor filter) 설계 방법에 있어서 종래에 발표된 clocking scheme을 일반화하고, 이로써 생기는 RC, RL 등의 병렬소자들과 유손실 또는 무손실 LC 병렬공진 소자들을 제시하였다. 또 이들 업자들을 SCF의 설계에 응용함으로써 종래의 방법에 비해 연산증폭기와 Capacitor의 수를 줄일 수 있는 설계 방법에 대해 기술하였다. 이 결과로 SCF를 더욱 작은 칩(chip) 면적으로 집적화 할 수 있겠다. 또 새로운 구조를 갖는 VIS를 제시하고 이를 사명한 저역통과 여파기와 간단한 대역골지 여파기를 실험하여 그 결과가 이론치와 잘 일치함을 보였다.

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Design and Implementation of a New Multilevel DC-Link Three-phase Inverter

  • Masaoud, Ammar;Ping, Hew Wooi;Mekhilef, Saad;Taallah, Ayoub;Belkamel, Hamza
    • Journal of Power Electronics
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    • 제14권2호
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    • pp.292-301
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    • 2014
  • This paper presents a new configuration for a three-phase multilevel voltage source inverter. The main bridge is built from a classical three-phase two-level inverter and three bidirectional switches. A variable DC-link employing two unequal DC voltage supplies and four switches is connected to the main circuit in such a way that the proposed inverter produces four levels in the output voltage waveform. In order to obtain the desired switching gate signals, the fundamental frequency staircase modulation technique is successfully implemented. Furthermore, the proposed structure is extended and compared with other types of multilevel inverter topologies. The comparison shows that the proposed inverter requires a smaller number of power components. For a given number of voltage steps N, the proposed inverter requires N/2 DC voltage supplies and N+12 switches connected with N+7 gate driver circuits, while diode clamped or flying capacitor inverters require N-1 DC voltage supplies and 6(N-1) switches connected with 6(N-1) gate driver circuits. A prototype of the introduced configuration has been manufactured and the obtained simulation and experimental results ensure the feasibility of the proposed topology and the validity of the implemented modulation technique.

Three-Phase Soft Switching Sinewave Inverter with Bridge Power Module Package Configurated Auxiliary Resonant AC Link Snubber

  • Iyomori Hisashi;Nagai Shin-ichiro;Shiraishi Kazuhiro;Ahmed Tarek;Eiji Hiraki;Mutsuo Nakaoka
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2003년도 춘계전력전자학술대회 논문집(2)
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    • pp.507-510
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    • 2003
  • This paper presents a novel prototype of tile three-phase bridge power block module type a auxiliary resonant AC link snubber circuit, which is effectively used for the three-phase voltage source type sinewave soft switching PWM inverter using IGBTs. Its operating principle Is described for current source load model, along with its practical design approach based on the simulation data. The performance evaluation of the three-phase voltage source type snewave soft switching PWM inverter incorporating a single three-phase bridge mo여le of active auxiliary resonant AC link snubber treated here Is illustrated, which is concerned with power duality efficiency power loss analysis. This inverter is discussed as compared with those of tile three-phase voltage source type sinewave hard switching PWM inverter. The power loss analysis of this soft switching PWM Inverter using IGBT power modules is evaluated on the basis of the measured v-i characteristics and switching power losses of IGBT, and antiparaliel diodes. The practical effectiveness of this inverter is proven by the power loss analysis for distributed power supply.

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GaN HEMT를 적용한 3kW급 계통연계 태양광 인버터의 방열 설계 및 개발 (Development of a 3 kW Grid-tied PV Inverter With GaN HEMT Considering Thermal Considerations)

  • 한석규;노용수;현병조;박준성;주동명
    • 전력전자학회논문지
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    • 제26권5호
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    • pp.325-333
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    • 2021
  • A 3 kW grid-tied PV inverter with Gallium nitride high-electron mobility transistor (GaN HEMT) for domestic commercialization was developed using boost converter and full-bridge inverter with LCL filter topology. Recently, many GaN HEMTs are manufactured as surface mount packages because of their lower parasitic inductance characteristic than standard TO (transistor outline) packages. A surface mount packaged GaN HEMT releases heat through either top or bottom cooling method. IGOT60R070D1 is selected as a key power semiconductor because it has a top cooling method and fairly low thermal resistances from junction to ambient. Its characteristics allow the design of a 3 kW inverter without forced convection, thereby providing great advantages in terms of easy maintenance and high reliability. 1EDF5673K is selected as a gate driver because its driving current and negative voltage output characteristics are highly optimized for IGOT60R070D1. An LCL filter with passive damping resistor is applied to attenuate the switching frequency harmonics to the grid-tied operation. The designed LCL filter parameters are validated with PSIM simulation. A prototype of 3 kW PV inverter with GaN HEMT is constructed to verify the performance of the power conversion system. It achieved high power density of 614 W/L and peak power efficiency of 99% for the boost converter and inverter.

Implementation of Zero-Ripple Line Current Induction Cooker using Class-D Current-Source Resonant Inverter with Parallel-Load Network Parameters under Large-Signal Excitation

  • Ekkaravarodome, Chainarin;Thounthong, Phatiphat;Jirasereeamornkul, Kamon
    • Journal of Electrical Engineering and Technology
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    • 제13권3호
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    • pp.1251-1264
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    • 2018
  • The systematic and effective design method of a Class-D current-source resonant inverter for use in an induction cooker with zero-ripple line current is presented. The design procedure is based on the principle of the Class-D current-source resonant inverter with a simplified load network model that is a parallel equivalent circuit. An induction load characterization is obtained from a large-signal excitation test-bench based on parallel load network, which is the key to an accurate design for the induction cooker system. Accordingly, the proposed scheme provides a systematic, precise, and feasible solution than the existing design method based on series-parallel load network under low-signal excitation. Moreover, a zero-ripple condition of utility-line input current is naturally preserved without any extra circuit or control. Meanwhile, a differential-mode input electromagnetic interference (EMI) filter can be eliminated, high power quality in utility-line can be obtained, and a standard-recovery diode of bridge-rectifier can be employed. The step-by-step design procedure explained with design example. The devices stress and power loss analysis of induction cooker with a parallel load network under large-signal excitation are described. A 2,500-W laboratory prototype was developed for $220-V_{rms}/50-Hz$ utility-line to verify the theoretical analysis. An efficiency of the prototype is 96% at full load.

고속 SRM 구동시스템 설계 (Design of High Speed Drive)

  • 김태형;안영주;이동희;안진우
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2006년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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    • pp.95-98
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    • 2006
  • This paper proposes high speed SRM drive system for blower with a new 4-level inverter and precise excitation position generator. For the high speed blower, a proper inverter and control method are proposed and the output characteristics are analyzed. In order to get a fast build-up and demagnetization of excitation a current, 4-level inverter system is proposed. The proposed 4-level inverter has additional charge capacitor, power switch and diode in the conventional asymmetric converter. The charged high voltage is supplied to the phase winding for fast current build-up, and demagnetization current is charged to additional capacitor of 4-level inverter. In addition, a precise excitation position generator can reduce turn-on and turn-off angle error according to sampling period of digital control system. The proposed high speed SRM drive system is verified by computer simulation and experimental result.

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A New Current Controlled Inverter with ZVT Switching

  • Lee S. R.;Jeon C. H.;Ko S. H.
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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    • pp.309-313
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    • 2001
  • A single-phase bi-directional inverter with a diode bridge-type resonant circuit to implement ZVT(Zero Voltage Transition) switching is proposed. It is shown that the polarized ramptime current control algorithm, a method that belongs to the family of ZACE(Zero Average Current Error) methods, is a suitable technique to integrate with a typical single-phase ZVT inverter. The proposed current control algorithm is analyzed to design the circuit with auxiliary switch which can operate with ZVT for the main power switch. The simulation results would be shown to verify the proposed current algorithm to turn the main power switch on with ZVT and to operate the inverter bi-directionally

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A New Scheme for Maintaining Balanced DC Voltages in Static Var Compensator(SVC) Using Cascade Multilevel Inverter

  • Min, Wan-Ki;Min, Joon-Ki;Choi, Jae-Ho
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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    • pp.561-565
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    • 2001
  • This paper proposes a new switching scheme of a static var compensator(SVC) with cascade multilevel inverter which employs H-bridge inverter(HBI). To improve the un­balanced problem of the DC capacitor voltages, the rotated switching scheme of fundamental frequency is newly used. The optimized fundamental switching pattern with low switching frequency is adapted to be suitable for high application. The selective harmonic elimination method(SHEM) allows to keep the total harmonic distortion(THD) low in the output voltage of multilevel inverter. The SVC system is modeled using the d-q transform which calculates the instantaneous reactive power. This model is used to design a controller and analyze the SVC system. Simulated and experimental results are also presented and discussed to validate the proposed schemes.

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