• Title/Summary/Keyword: Interleaved converter

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Design of 3-Phase Interleaved Bidirectional DC-DC Converter for Phase Controlled Switching Method (상 제어 기법을 이용한 3상 인터리브드 양방향 DC-DC 컨버터의 시스템 설계)

  • Kim, JiHyun;Jung, Jae-Hun;Nho, Eui-Cheol;Kim, Heung-Geun;Chun, Tae-Won
    • Proceedings of the KIPE Conference
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    • 2015.11a
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    • pp.191-192
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    • 2015
  • 본 논문에서는 3상 인터리브드 양방향 DC-DC 컨버터의 상제어 스위칭 기법을 이용하여 부하의 변동에 따라 2상 또는 3상 인터리빙이 되도록 하는 시스템 설계방법을 제시한다. 3[kW] 시스템에 대하여 전류 임계모드가 되도록 하는 인덕턴스 값을 유도하였으며 2상으로 동작 시 최대 전력 구간 범위를 구하고 시뮬레이션을 통하여 제안한 방식의 타당성을 입증하였다.

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Current Ripple Analysis of 3-phase Interleaved Bidirectional DC-DC Converter In Case of DC Link Voltage Variation (DC 링크 전압이 가변하는 경우의 3상 인터리브드 양방향 DC-DC컨버터의 전류리플 해석)

  • Sun, Daun;Jung, Jae-Hun;Nho, Eui-Cheol;Kim, Heung-Geun;Chun, Tae-Won
    • Proceedings of the KIPE Conference
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    • 2015.11a
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    • pp.189-190
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    • 2015
  • 본 논문은 계통연계형 인버터의 DC-Link단 전압 변동에 따른 3상 인터리브드 양방향 DC-DC 컨버터의 배터리 전류 리플 분석에 관한 것이다. 배터리 전류 리플 저감을 위하여 인터리브드 방식을 사용하였으나 전압 변동에 따라 전류 리플이 변하므로 전류 리플을 최소화 하는 방법을 찾고자 한다. 전 부하구간에서 전류 임계모드로 동작시켜 시스템의 효율을 높였으며, 배터리 전압과 DC-Link단 전압 변동에 따라 주파수와 듀티를 가변시켜 출력전력을 제어하였다. 시뮬레이션을 통하여 전류 리플 해석 결과를 보였다.

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A 3kW Interleaved Half Bridge Low Voltage DC-DC Converter for Elecronic Vehicles (전기자동차용 3kW 인터리브드 하프브릿지 저전압 DC-DC 컨버터)

  • Lee, Wonhee;Nam, Kwanghee
    • Proceedings of the KIPE Conference
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    • 2015.11a
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    • pp.187-188
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    • 2015
  • 본 논문에서는 전기자동차의 저전압 보조배터리 충전용 인터리브드 하프브릿지 저전압 DC-DC 컨버터를 제안한다. 이 컨버터는 높은 출력 밀도, 높은 효율성 그리고 높은 전압 강하비가 요구된다. 이러한 조건을 만족하기 위해 우리는 두 컨버터의 병렬구조를 활용하였다. 이는 하나의 고출력 컨버터를 사용하는 거에 비해 트랜스포머 비용 감소, 고장허용, 낮은 출력 전류 리플 등의 장점을 가진다. 또한 Zero voltage switching(ZVS)이 가능하다. 두 컨버터 사이의 파라미터 차이에 의해 발생되는 부하 불평균을 막기 위해 간단한 보상 알고리즘도 적용되었다.

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Stability Analysis of FCHEV Energy System Using Frequency Decoupling Control Method

  • Dai, Peng;Sun, Weinan;Xie, Houqing;Lv, Yan;Han, Zhonghui
    • Journal of Power Electronics
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    • v.17 no.2
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    • pp.490-500
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    • 2017
  • Fuel cell (FC) is a promising power supply in electric vehicles (EV); however, it has poor dynamic performance and short service life. To address these shortcomings, a super capacitor (SC) is adopted as an auxiliary power supply. In this study, the frequency decoupling control method is used in electric vehicle energy system. High-frequency and low-frequency demand power is provided by SC and FC, respectively, which makes full use of two power supplies. Simultaneously, the energy system still has rapidity and reliability. The distributed power system (DPS) of EV requires DC-DC converters to achieve the desired voltage. The stability of cascaded converters must be assessed. Impedance-based methods are effective in the stability analysis of DPS. In this study, closed-loop impedances of interleaved half-bridge DC-DC converter and phase-shifted full-bridge DC-DC converter based on the frequency decoupling control method are derived. The closed-loop impedance of an inverter for permanent magnet synchronous motor based on space vector modulation control method is also derived. An improved Middlebrook criterion is used to assess and adjust the stability of the energy system. A theoretical analysis and simulation test are provided to demonstrate the feasibility of the energy management system and the control method.

An 8b 52 MHz CMOS Subranging A/D Converter Design for ISDN Applications (광대역 종합 통신망 응용을 위한 8b 52 MHz CMOS 서브레인징 A/D 변환기 설계)

  • Hwang, Sung-Wook;Lee, Seung-Hoon
    • Journal of IKEEE
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    • v.2 no.2 s.3
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    • pp.309-315
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    • 1998
  • This paper describes an 8b 52 MHz CMOS subranging analog-to-digital converter (ADC) for Integrated Services Digital Network (ISDN) applications. The proposed ADC based on the improved time-interleaved architecture removes the holding time which is typically observed in the conventional double-channel subranging ADCs to increase throughput rate. Moreover, the ADC employs the interpolation technique in the back-end subranging ADCs far residue signal processing to minimize die area and power consumption. The fabricated and measured prototype ADC in a 0.8 um n-well double-poly double-metal CMOS process typically shows a 52 MHz sampling rate at a 5 V supply voltage with 230 mW, and a 40 MHz sampling rate at a 3 V power supply with 60 mW power consumption.

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Development of DC/DC Converters and Actual Vehicle Simulation Experiment for 150 kW Class Fuel-cell Electric Vehicle (150kW급 수소연료전지 차량용 DC/DC 컨버터 개발 및 실차모사 실험)

  • Kim, Sun-Ju;Jeong, Hyeonju;Choi, Sewan;Cho, Jun-Ho;Jeon, Yujong;Park, Jun-Sung;Yoon, Hye-Sung
    • The Transactions of the Korean Institute of Power Electronics
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    • v.27 no.1
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    • pp.26-32
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    • 2022
  • This paper proposes a power system that includes a 120k W fuel cell DC-DC converter (FDC) and 30 kW bidirectional DC-DC converter (BHDC) for a 150 kW fuel-cell vehicle. With a high DC link voltage of 800 V, the efficiency and power density of the power electronic components are improved. Through the modular design of FDC and BHDC, electric components are shared, resulting in reduced mass production costs. The switching frequency of 30 kHz of full SiC devices and optimal design of coupled inductor reduce the volume, achieving a power density of 8.3 kW/L. Furthermore, a synergetic operation strategy using variable limiter control of FDC and BHDC was proposed to efficiently operate the fuel cell vehicle considering the fuel cell stack efficiency according to the load. Finally, the performance of the prototype was verified by Highway Fuel Economy Driving Schedule testing, EMI test, and the linked operation between FDC and BHDC. The full load efficiencies of the FDC and BHDC prototypes are 98.47% and 98.74%, respectively.

A study on an optimal design of the high frequency transformer in LLC DC to DC resonant converter (LLC DC to DC 공진 컨버터의 고주파 변압기 최적화 설계에 관한 연구)

  • Jong-Hae Kim
    • Journal of IKEEE
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    • v.27 no.4
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    • pp.587-600
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    • 2023
  • This paper presents an optimal design of the slim type high frequency transformer used in the LLC DC to DC resonant converter for 65-inch UHD-TV with the rated power of 315W. This paper also performs an optimal design of the slim type high frequency through core loss analysis, AC winding loss analysis, and optimization design of the winding arrangement of the LLC resonant transformer. Particularly, the high-efficiency and slim type high frequency transformer based on the obtained results from theoretical analysis in this paper is constructed in the interleaved and vertical winding structures of its transformer to realize the winding method of automatic type and minimize AC winding loss. The primary and secondary windings of the slim type high frequency transformer the vertical winding structure proposed in this paper used the Litz-wire windings, PCB and copper plate windings, respectively. Finally, an optimal design of the slim type high frequency transformer proposed in this paper was carried out through the experimental results to confirm the validity of theoretical analysis based on the simulation results using Maxwell 2D and 3D tool.

A 4-Channel Multi-Rate VCSEL Driver with Automatic Power, Magnitude Calibration using High-Speed Time-Interleaved Flash-SAR ADC in 0.13 ㎛ CMOS

  • Cho, Sunghun;Lee, DongSoo;Lee, Juri;Park, Hyung-Gu;Pu, YoungGun;Yoo, Sang-Sun;Hwang, Keum Cheol;Yang, Youngoo;Park, Cheon-Seok;Lee, Kang-Yoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.3
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    • pp.274-286
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    • 2016
  • This paper presents a 4-channel multi-rate vertical-cavity surface-emitting laser (VCSEL) driver. In order to keep the output power constant with respect to the process, voltage, temperature (PVT) variations, this research proposes automatic power and magnitude. For the fast settling time, the high-speed 10-bit time-interleaved Flash-successive approximation analog to digital converter (Flash-SAR ADC) is proposed and shared for automatic power and magnitude calibration to reduce the die area and power consumption. This chip is fabricated using $0.13-{\mu}m$ CMOS technology and the die area is $4.2mm^2$. The power consumption is 117.84 mW per channel from a 3.3 V supply voltage at 10 Gbps. The measured resolution of bias /modulation current for APC/AMC is 0.015 mA.

Implementation of a FLEX Protocol Signal Processor for High Speed Paging System (고속 페이징 시스템을 위한 FLEX 프로토콜 신호처리기의 구현)

  • Gang, Min-Seop;Lee, Tae-Eung
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.1
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    • pp.69-78
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    • 2001
  • This paper presents the design and FPGA implementation of a FLEX PSP(Protocol Signal Processor) for the portable high speed paging system. In this approach, two algorithms are newly proposed for implementing the PSP which provides capabilities of the maximum 6,400bps at speed, high-channel throughput, real time error correction and an effective frame search function. One is an accurate symbol synchronization algorithm which is applied for synchronizing the interleaved 4-level bit symbols which are received at input stage of A/D converter, and the other is a modified fast decoding algorithm which is provided for realizing double error correction of (31,21)BCH signal. The PSP is composed of six functional modules, and each module is modelled in VHDL(VHSIC Hardware Description Language). Both functional simulation and logic synthesis have performed for the proposed PSP through the use of Synopsys$^{TM}$ tools on a Axil-320 Workstation, and where Altera 10K libraries are used for logic synthesis. From logic synthesis, we can see that the number of gates is about 2,631. For FPGA implementation, timing simulation is performed by using Altera MAX+ PLUS II, and its results will be also given. The PSP which is implemented in 6 FPGA devices on a PCB has been verified by means of Logic Analyzer.r.

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PEBB Based Bi-directional Rapid Charging System for EV Traction Battery

  • Kang, Taewon;Chae, Beomseok;Suh, Yongsug
    • Proceedings of the KIPE Conference
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    • 2013.07a
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    • pp.323-324
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    • 2013
  • This paper presents a simple and cost-effective stand-alone rapid battery charging system of 30kW for electric vehicles. The proposed system mainly consists of active front-end rectifier of neutral point clamped 3-level type and non-isolated bi-directional dc-dc converter of multi-phase interleaved half-bridge topology. The charging system is designed to operate for both lithium-polymer and lithium-ion batteries. The complete charging sequence is made up of three sub-interval operating modes; pre-charge mode, constant-current mode, and constant-voltage mode. The pre-charge mode employs the stair-case shaped current profile to accomplish shorter charging time while maintaining the reliable operation of the battery. The proposed system is specified to reach the full-charge state within less than 16min for the battery capacity of 8kWh by supplying the charging current of 78A. Owing to the simple and compact power conversion scheme, the proposed solution has superior module-friendly mechanical structure which is absolutely required to realize flexible power expansion capability in a very high-current rapid charging system.

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