• Journal of the Korean Society for Precision Engineering
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• v.27 no.4
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• pp.14-19
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• 2010

In this paper, using interleaved power factor correction how to improve the inverter efficiency studied. Interleaved method can reduce the conduction losses and the inductor energy. Generally, critical conduction mode (CRM) boost PFC converter used low power level because of the high peak currents. if you use the interleaved mode, CRM PFC can be used medium or high power application. interleaved CRM PFC can reduce current ripple for higher system reliability and size of buck capacitor and EMI filter size. Interleaved CRM PFC that is installed in front of inverter can maintain the constant voltage regardless of the input voltage.

• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.24-25
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• 2017

In this paper, a low cost bridgeless interleaved power factor correction topology for electric vehicle charger application is proposed. With the proposed topology the number of switches, inductors, current sensors and associated circuits can be reduced, thereby reducing the cost of the system as compared to the conventional bridgeless PFC circuit. The reduced input current ripple by the proposed interleaved topology makes it suitable for high power applications such as electric vehicle chargers since it can reduce the size of the inductor core and the Electro Magnetic Interference (EMI) problem. In the proposed topology only one current sensor is required. All the boost inductor currents can be reconstructed by sampling the output current and used to control the input current. Therefore the typical problem caused by the unequal current gain of each current sensor inherently does not exist in the proposed topology. In addition the current sharing between converters can be achieved more accurately and the high frequency distortion is decreased. The performance of the proposed converter is verified by the experimental results with a prototype of 6.6kW bridgeless interleaved PFC circuit.

• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.1
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• pp.53-58
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• 2021

Operation of the interleaved Boost PFC converter in Critical Conduction Mode (CrM) shows the advantages of high efficiency and good EMI characteristics owing to the valley switching of FET. However, when it is designed for a highly pulsating load, operation at a relatively high frequency is inevitable at non-pulsating typical load condition, resulting in efficiency degradation. Moreover, the physical size of the inductor becomes problematic because of the nature of the CrM operation, where the inductor peak current is about two times the inductor average current, thereby requiring high DC-bias characteristics, which is worse when the output power is high. In this study, a new parallel driving method of two sets of interleaved boost PFC converters for highly pulsating high-power application is proposed. The proposed method does not require any additional load-sharing controller, resulting in high efficiency and smaller inductor size.

• Journal of Electrical Engineering and information Science
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• v.3 no.3
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• pp.366-372
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• 1998

A high efficiency interleaved active clamp forward converter with self driven synchronous rectifiers for a modular power processor is presented. To simplify the gate drive circuits, N-P MOSFETs coupled active clamp method is used. An efficiency about 90% for the load range of 50-100% is achieved. The details of design for the power stage and current mode control circuit are provided, and also some experimental results are given.

• Journal of Power Electronics
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• v.16 no.5
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• pp.1629-1638
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• 2016

Differential power processing (DPP) systems are among the most effective architectures for photovoltaic (PV) power systems because they are highly efficient as a result of their distributed local maximum power point tracking ability, which allows the fractional processing of the total generated power. However, DPP systems require a high-efficiency, high step-up/down bidirectional converter with broad operating ranges and galvanic isolation. This study proposes a single, magnetic, high-efficiency, high step-up/down bidirectional DC-DC converter. The proposed converter is composed of a bidirectional flyback and a bidirectional isolated switched-capacitor cell, which are competitively cheap. The output terminals of the flyback converter and switched-capacitor cell are connected in series to obtain the voltage step-up. In the reverse power flow, the converter reciprocally operates with high efficiency across a broad operating range because it uses hard switching instead of soft switching. The proposed topology achieves a genuine on-off interleaved energy transfer at the transformer core and windings, thus providing an excellent utilization ratio. The dynamic characteristics of the converter are analyzed for the controller design. Finally, a 240 W hardware prototype is constructed to demonstrate the operation of the bidirectional converter under a current feedback control loop. To improve the efficiency of a PV system, the maximum power point tracking method is applied to the proposed converter.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.6
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• pp.16-24
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• 2009

In this paper, DC-DC buck converter with on-chip filter inductor and capacitor is presented. By operating at high switching frequency of 50MHz with stacked interleaved topology, we reduced inductor and capacitor sizes compared to previously published DC-DC buck converters. The proposed circuit is designed in a standard $0.5{\mu}m$ CMOS process, and chip area is $9mm^2$. This circuit operated at the input voltage of $3{\sim}5V$ range, the maximum load current of 250mA, and the maximum efficiency of 71%.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2007.11a
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• pp.319-322
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• 2007

In the development of paralleling techniques, Multi-Phase Interleaved(MPI) converter constitutes one of the most promising alternatives reported in the last years. This technique consists of a phase shifting of the control signals of several cells in parallel operating at the same switching frequency. As a result, the aggregated input and output current waveform exhibit lower ripple amplitude and smaller harmonics content than in synchronous or stochastic operation modes. Based on the inherent advantages of the MPI converter, in this paper, a control scheme, which can reduce current and voltage rifle, is proposed for PEMFC generation systems. The MPI boost converter is composed of several identical boost converters connected in parallel.

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.1224-1225
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• 2011

This paper proposes a novel soft-switching interleaved boost converter composed of two shunted elementary PFC boost conversion units and an auxiliary inductor. This converter is able to turn on both the active power switches at zero voltage to reduce their switching losses and evidently raise the conversion efficiency and power factor. Since the two parallel-operated elementary boost units are identical, operation analysis and design for the converter module becomes quite simple. A laboratory test circuit is built, and the circuit operation shows satisfactory agreement with the theoretical analysis. The performance of the proposed PFC rectifier was evaluated on an experimental 300[W] PFC prototype.

• Journal of IKEEE
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• v.24 no.2
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• pp.586-591
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• 2020

An interleaved current-fed high step-up DC-DC converter is proposed. Besides high voltage gain, a low ripple input current is achieved by adopting interleaving operation. Moreover, soft-switching characteristic of the proposed converter reduces switching losses of active power switches and raise the conversion efficiency. The reverse-recovery problem of output rectifiers is also alleviated by controlling the current changing rates of diodes by utilizing the leakage inductances of transformers. Experimental results obtained on a 200W prototype are discussed.

• Journal of Power Electronics
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• v.16 no.5
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• pp.1735-1742
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• 2016

This paper proposes an interleaved five-level boost converter based on a switched-capacitor network. The operating principle of the converter under the CCM mode is analyzed. A high voltage gain, low component stress, small input current ripple, and self-balancing function for the capacitor voltages in the switched-capacitor networks are achieved. In addition, a three-loop control strategy including an outer voltage loop, an inner current loop and a voltage-balance loop has been researched to achieve good performances and voltage-balance effect. An experimental study has been done to verify the correctness and feasibility of the proposed converter and control strategy.