• 한국정밀공학회지
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• 제13권11호
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• pp.46-56
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• 1996

Planarization technique is rapidly recognized as a critical step in chip fabrication due to the increase in wiring density and the trend towards a three dimensional structure. Global planarity requires the preferential removal of the projecting features. Also, the several materials i.e. Si semiconductor, oxide dielectric and sluminum interconnect on the chip, should be removed simultaneously in order to produce a planar surface. This research has investihgated the development of the chemical mechanical polishing(CMP) machine with uniform pressure and velocity mechanism, and the pad insensitive to pattern topography named hard grooved(HG) pad for global planarization. Finally, a successful result of uniformity less than 5% standard deviation in residual oxide film and planarity less than 15nm in residual step height of 4 inch device wafer, is achieved.

• 반도체디스플레이기술학회지
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• 제8권3호
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• pp.19-23
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• 2009

We have studied dielectric characteristics of low-k interlayer dielectric materials was fabricated by plasma enhanced chemical vapor deposition (PECVD). BTMSM precursor was introduced with the flow rates from 24 sccm to 32 sccm by 2 sccm step in the constant flow rate of 60 sccm $O_2$. Then, SiOCH thin film deposited at room temperature was annealed at temperature of $400^{\circ}C$ and $500^{\circ}C$ for 30 minutes in vacuum. The vibrational groups of SiOCH thin films were analyzed by FT/IR absorption lines, and the dielectric constant of the low-k SiOCH thin films were obtained by measuring C-V characteristic curves. With the result that FTIR analysis, as BTMSM flow rate increase, relative carbon content of SiOCH thin film increased from 29.5% to 32.2%, and increased by 32.8% in 26 sccm specimen after $500^{\circ}C$ annealing. Dielectric constant was lowest by 2.32 in 26 sccm specimen, and decreased more by 2.05 after $500^{\circ}C$ annealing. Also, leakage current is lowest by $8.7{\times}10^{-9}A/cm^2$ in this specimen. In the result, shift phenomenon of chemical bond appeared in SiOCH thin film that BTMSM flow rate is deposited by 26 sccms, and relative carbon content was highest in this specimen and dielectric constant also was lowest value

• 센서학회지
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• 제12권2호
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• pp.66-71
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• 2003

Pt/AlGaN Schottky-type UV photodetectors were designed and fabricated. A low-temperature AlGaN interlayer buffer was grown between the AlGaN and GaN film in the diode structure epitaxy to obtain crack-free AlGaN active layers. A comparison was then made of the structural, electrical, and optical characteristics of two different diodes: one with an AlGaN($0.5\;{\mu}m$)/n+-GaN(2 nm) structure (type 1) and the other with an AlGaN($0.5\;{\mu}m$)/AlGaN interlayer($150\;{\AA}$)/n+-GaN($3\;{\mu}m$) structure(type 2). A crack-free AlGaN film was obtained by the insertion of a low-temperature AlGaN interlayer with an aluminum mole fraction of 26% into the $Al_xGa_{1-x}N$ layer. The fabricated Pt/$Al_{0.33}Ga_{0.67}N$ photodetector had a leakage current of 1 nA for the type 1 diode and $0.1\;{\mu}A$ for the type 2 diode at a reverse bias of -5 V. For the photoresponse measurement, the type 2 diode exhibited a cut-off wavelength of 300 nm, prominent responsivity of 0.15 A/W at 280 nm, and UV-visible extinction ratio of $1.5{\times}10^4$. Accordingly, the Pt/$Al_{0.33}Ga_{0.67}N$ Schottky-type ultraviolet photodetector with an AlGaN interlayer exhibited superior electrical and optical characteristics and improved UV detecting properties.

• 한국재료학회지
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• 제17권5호
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• pp.256-262
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• 2007

Effects of interlayer and the combination of different coating methods on the mechanical and corrosion behaviors of TiN and CrN coated on 420 stainless steel have been studied. STS 420 specimen were tempered at $300^{\circ}C$ for 1 hr in vacuum furnace. The TiN and CrN thin film with 2 ${\mu}m$ thickness were coated by arc ion plating and DC magnetron sputtering following the formation of interlayer for pure titanium and chromium with 0.2 ${\mu}m$ thickness. The microstructure and surface analysis of the specimen were conducted by using SEM, XRD and roughness tester. Mechanical properties such as hardness and adhesion also were examined. XRD patterns of TiN thin films showed that preferred TiN (111) orientation was observed. The peaks of CrN (111) and $Cr_2N$ (300) were only observed in CrN thin films deposited by arc ion plating. Both TiN and CrN deposited by arc ion plating had the higher adhesion and hardness compared to those formed by magnetron sputtering. The specimen of TiN and CrN on which interlayer deposited by magnetron sputtering and thin film deposited by arc ion plating had the highest adhesion with 22.2 N and 19.2 N. respectively. TiN and CrN samples shown the most noble corrosion potentials when the interlayers were deposited by using magnetron sputtering and the metal nitrides were deposited by using arc ion plating. The most noble corrosion potentials of TiN and CrN were found to be approximately -170 and -70 mV， respectively.

• 한국자기학회지
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• 제11권5호
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• pp.211-216
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• 2001

합성형 반강자성체(synthetic antiferromagnet)인 CoFe/Ru/CoFe/FeMn을 사용하고 자유층으로 NiFe/CoFe 이중 층을 사용한 탑 스핀밸브 구조를 직류 마그네트론 방식으로 제조하여, 구속층의 두께변화에 따른 자기적 특성과 층간교환자계(interlayer coupling field)의 변화를 조사하였다. Si/Ta(50 )/NiFe(34 )CoFe(16 )/Cu (26 )/CoFe(Pl )/Ru(7 )/CoFe(P2 )/FeMn(100 )/Ta(50 ) 합성형 탑 스핀 밸브 시료에서 고정층의 두께 변화에 따른 자기저항 특성을 조사한 결과 자기저항비가 Pl-P2가 +25 에서 -25 으로 변화시 자기저항비는 완만하게 감소하나, Pl-P2가 영 근처에서는 자화방향의 큰 이탈(canting)에 의하여 자기저항비가 급격히 감소함을 알 수 있다. 합성형 탑 스핀 밸브의 고정층의 두께에 따른 층간교환자계의 변화에 관한 모델을 제시하였으며, 이 모델과 실험에서 구한 결과가 일치함을 확인 할 수 있었다. 단지 Pl-P2근처 영역에서는스핀 플롭 혹은 스핀의 큰 이탈에 의하여 모델의 결과에서 벗어남을 확인하였다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.I
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• pp.269-271
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• 2005

Using optimized sputtering condition of a-Si and $SiO_2$ thin film, we can obtained the large grained poly-Si film on PES substrate. The gate dielectric grown by plasma enhanced atomic layer deposition, laser activation and organic interlayer dielectric material make TFTs on PES possible with mobility of $11cm^2/Vs$ (nMOS) and $7cm_2/Vs$ (pMOS).

• 한국전기전자재료학회논문지
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• 제21권4호
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• pp.362-367
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• 2008

We have Manufactured the low-k dielectric interlayer fabricated by plasma enhanced chemical vapor deposition (PECVD), The thin film of SiOCH is studied correlation between components and Dielectric constant. The precursor was evaporated and introduced with the flow rates from 16 sccm to 25 sccm by 1sccm step in the constant flow rate of 60 sccm $O_2$ in process chamber. The chemical characteristics of SiOCH were analyzed by measuring FT/IR absorption lines and obtained each dielectric constant measuring C-V. Then compare respectively. ILD of BTMSM/$O_2$ could have low dielectric constant about $k\sim2$, and react sensitively. Also dielectric constant could be decreased by the effects of decreasing $CH_3$ and growing Si-O-Si(C) after annealing process.

• 한국진공학회지
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• 제7권s1호
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• pp.134-139
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• 1998

Amorphous fluorocarbon (a-C:F) is of interest for low dielectric interlayer material, but in this work we applied this material to FED field emitter. N-doped a-C:F films were deposited by inductively coupled plasma chemical vapor deposition (ICPCVD). The Raman spectra were measured to study the film structure and inter-band optical absorption coefficients were measured using Perkin-Elmer UV-VIS-IR spectrophotometer and optical band gap was obtained using Tauc's plot. XPS spectrum and AFM image were investigated to study bond structure and surface morphology. Current-electric field(I-E) characteristic of the film was measured for the characterization of electron emission properties. The optimum doping concentration was found to be [N2]/[CF4]=9% in the gas phase. The turn-on field and the emission current density at $[N_2]/[CF_4]$=9% were found to be 7.34V/$\mu\textrm{m}$ and 16 $\mu\textrm{A}/\textrm{cm}^2$ at 12.8V/$\mu\textrm{m}$, respectively.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 추계학술대회 논문집
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• pp.118-119
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• 2007

High performance three-dimensional (3-D) stacked poly-Si complementary metal-oxide semiconductor (CMOS) inverters with a high quality laser crystallized channel were fabricated. Low temperature crystallization methods of a-Si film using the excimer-laser annealing (ELA) and sequential lateral solidification (SLS) were performed. The NMOS thin-film-transistor (TFT) at lower layer of CMOS was fabricated on oxidized bulk Si substrate, and the PMOS TFT at upper layer of CMOS was fabricated on interlayer dielectric film. The 3-D stacked poly-Si CMOS inverter showed excellent electrical characteristics and was enough for the vertical integrated CMOS applications.

• 한국세라믹학회지
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• 제23권6호
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• pp.33-36
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• 1986

The $PbTiO_3$is well known materials having remarkable ferroelectric piezoelectric and pyro-electric properties. Thin films of the lead titanite has been successfully fabricated by Chemical Vapor Deposition on the borosilicate glass and titanium substrate. The $PbTiO_3$ thin film deposited on the borosilicate glass using the $PbCl_2$, $TiCl_4$ dry oxygen and wet oxygen at different temperatures (50$0^{\circ}C$-$700^{\circ}C$) grows along the (001) preferred orientation. On the other hand the $PbTiO_3$ thin film deposited on the titanium substrate using the PbO grows along the (101) preferred orientation. Growth orientation of deposited $PbTiO_3$ depends on the reaction species irrespective of substrate materials. Maximum dielectic constant and loss tangent of the $PbTiO_3$ thin film deposited on the titanium substrate are about 90 and 0.02 respectively, . Deposition rates of $PbTiO_3$ deposited on the borosilicate glass and titanium substrate are 10-15 ${\mu}{\textrm}{m}$/hr. Titanium dioxide interlayer formed be-tween $PbTiO_3$ film and titanium substrate material, It improved the adhesion of the film.