• Title/Summary/Keyword: Interconnection Cost

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The Conversion factor for Allocation of Interconnection Charge Between Fixed and Mobile Networks (유무선망 상호접속료 배부를 위한 서비스간 환산계수 연구)

  • Kim, Jae-Won
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.12 no.7
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    • pp.3275-3279
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    • 2011
  • The matter of the calculation of the mutual access fee has become one of the hottest issues among service providers and attracted concerns from concerned regulatory authorities. It is essential to conclude a rational and systematic procedure for interconnection costs and charge between fixed and mobile networks. In this paper, I proposed the conversion factor scheme between circuit switched voice and packet switched data service in the domestic CDMA mobile system based on analysis of the rational GSM allocation method of common cost.

A Model Interconnecting ISP Networks (ISP 네트워크간 상호접속 모델)

  • Choi, Eun-Jeong;Tcha, Dong-Wan
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 2005.10a
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    • pp.388-393
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    • 2005
  • Private peering, public peering and transit are three common types of interconnection agreements between providers in the Internet. An important decision that an Internet service provider (ISP) has to make is which private peering/transit ISPs and Internet exchanges (IXs) to connect with to transfer traffic at a minimal cost. In this paper, we deal with the problem to find the minimum cost set of private peering/transit ISPs and IXs for a single ISP. There are given a set of destinations with traffic demands, and a set of potential private peering/transit ISPs and IXs with routing information (routes per destination, the average AS-hop count to each destination, etc.), cost functions and capacities. Our study first considers all the three interconnection types commonly used in real world practices. We show that the problem is NP-hard, and propose a heuristic algorithm for it. We then evaluate the quality of the heuristic solutions for a set of test instances via comparison with the optimal ones obtained by solving a mixed integer programming formulation of the problem. Computational results show that the proposed algorithm provides near-optimal solutions in a fast time.

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Optimal Terminal Interconnection Reconstruction along with Terminal Transition in Randomly Divided Planes

  • Youn, Jiwon;Hwang, Byungyeon
    • Journal of information and communication convergence engineering
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    • v.20 no.3
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    • pp.160-165
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    • 2022
  • This paper proposes an efficient method of reconstructing interconnections when the terminals of each plane change in real-time situations where randomly divided planes are interconnected. To connect all terminals when the terminals of each plane are changed, we usually reconstruct the interconnections between all terminals. This ensures a minimum connection length, but it takes considerable time to reconstruct the interconnection for the entire terminal. This paper proposes a solution to obtain an optimal tree close to the minimum spanning tree (MST) in a short time. The construction of interconnections has been used in various design-related areas, from networks to architecture. One of these areas is an ad hoc network that only consists of mobile hosts and communicates with each other without a fixed wired network. Each host of an ad hoc network may appear or disappear frequently. Therefore, the heuristic proposed in this paper may expect various cost savings through faster interconnection reconstruction using the given information in situations where the connection target is changing.

A Study on Interconnection Regime: Core Issues and Alternatives (국내 상호접속제도 연구: 핵심이슈와 대안 발굴)

  • Kim, Il-Jung;Shin, Minsoo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.40 no.4
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    • pp.678-691
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    • 2015
  • Internet and mobile traffic continues to surge exponentially in recent years due to popularization of smart devices, the appearance of various internet services carrying large amount of traffic from richer content and applications. This phenomenon leaded to various network problems such as the congestion delay, the non-balanced traffic ratio between ISPs, the continuous network investment cost and the Internet access problems. In light of changed data-driven communication ecosystem, There are growing concerns by both academia and industry that settlement-free peering and full transit regime have the limitations such as not only difficulties in maintaining mutual benefits but also difficulties in securing investment incentives for upgrading network performance and quality. Thus, it becomes more necessary for introducing the evolved internet interconnection regime which can fulfill the All-IP network environment. This study derives core issues regarding internet interconnection regime in Korea and suggest new evolved alternatives based on three point of view(traffic optimization, cost optimization, network investment optimization) through the empirical analysis.

Embedding between a Macro-Star Graph and a Matrix Star Graph (매크로-스타 그래프와 행렬 스타 그래프 사이의 임베딩)

  • Lee, Hyeong-Ok
    • The Transactions of the Korea Information Processing Society
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    • v.6 no.3
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    • pp.571-579
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    • 1999
  • A Macro-Star graph which has a star graph as a basic module has node symmetry, maximum fault tolerance, and hierarchical decomposition property. And, it is an interconnection network which improves a network cost against a star graph. A matrix star graph also has such good properties of a Macro-Star graph and is an interconnection network which has a lower network cost than a Maco-Star graph. In this paper, we propose a method to embed between a Macro-Star graph and a matrix star graph. We show that a Macro-Star graph MS(k, n) can be embedded into a matrix star graph MS\ulcorner with dilation 2. In addition, we show that a matrix star graph MS\ulcorner can be embedded into a Macro-Star graph MS(k,n+1) with dilation 4 and average dilation 3 or less as well. This result means that several algorithms developed in a star graph can be simulated in a matrix star graph with constant cost.

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Analysis of Cell to Module Loss Factor for Shingled PV Module

  • Chowdhury, Sanchari;Cho, Eun-Chel;Cho, Younghyun;Kim, Youngkuk;Yi, Junsin
    • New & Renewable Energy
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    • v.16 no.3
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    • pp.1-12
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    • 2020
  • Shingled technology is the latest cell interconnection technology developed in the photovoltaic (PV) industry due to its reduced resistance loss, low-cost, and innovative electrically conductive adhesive (ECA). There are several advantages associated with shingled technology to develop cell to module (CTM) such as the module area enlargement, low processing temperature, and interconnection; these advantages further improves the energy yield capacity. This review paper provides valuable insight into CTM loss when cells are interconnected by shingled technology to form modules. The fill factor (FF) had improved, further reducing electrical power loss compared to the conventional module interconnection technology. The commercial PV module technology was mainly focused on different performance parameters; the module maximum power point (Pmpp), and module efficiency. The module was then subjected to anti-reflection (AR) coating and encapsulant material to absorb infrared (IR) and ultraviolet (UV) light, which can increase the overall efficiency of the shingled module by up to 24.4%. Module fabrication by shingled interconnection technology uses EGaIn paste; this enables further increases in output power under standard test conditions. Previous research has demonstrated that a total module output power of approximately 400 Wp may be achieved using shingled technology and CTM loss may be reduced to 0.03%, alongside the low cost of fabrication.

Overview on Flip Chip Technology for RF Application (RF 응용을 위한 플립칩 기술)

  • 이영민
    • Journal of the Microelectronics and Packaging Society
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    • v.6 no.4
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    • pp.61-71
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    • 1999
  • The recent trend toward higher frequencies, miniaturization and lower-cost in wireless communication equipment is demanding high density packaging technologies such flip chip interconnection and multichip module(MCM) as a substitute of conventional plastic package. With analyzing the recently reported research results of the RF flip chip, this paper presents the technical issues and advantages of RF flip chip and suggest the flip chip technologies suitable for the development stage. At first, most of RF flip chips are designed in a coplanar waveguide line instead of microstrip in order to achieve better electrical performance and to avoid the interaction with a substrate. Secondly, eliminating wafer back-side grinding, via formation, and back-side metallization enables the manufacturing cost to be reduced. Finally, the electrical performance of flip chip bonding is much better than that of plastic package and the flip chip interconnection is more suitable for Transmit/Receiver modules at higher frequency. However, the characterization of CPW designed RF flip chip must be thoroughly studied and the Au stud bump bonding shall be suggested at the earlier stage of RF flip chip development.

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FLIP CHIP ON ORGANIC BOARD TECHNOLOGY USING MODIFIED ANISOTROPIC CONDUCTIVE FILMS AND ELECTROLESS NICKEL/GOLD BUMP

  • Yim, Myung-Jin;Jeon, Young-Doo;Paik, Kyung-Wook
    • Journal of the Microelectronics and Packaging Society
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    • v.6 no.2
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    • pp.13-21
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    • 1999
  • Flip chip assembly directly on organic boards offers miniaturization of package size as well as reduction in interconnection distances resulting in a high performance and cost-competitive Packaging method. This paper describes the investigation of alternative low cost flip-chip mounting processes using electroless Ni/Au bump and anisotropic conductive adhesives/films as an interconnection material on organic boards such as FR-4. As bumps for flip chip, electroless Ni/Au plating was performed and characterized in mechanical and metallurgical point of view. Effect of annealing on Ni bump characteristics informed that the formation of crystalline nickel with $Ni_3$P precipitation above $300^{\circ}C$ causes an increase of hardness and an increase of the intrinsic stress resulting in a reliability limitation. As an interconnection material, modified ACFs composed of nickel conductive fillers for electrical conductor and non-conductive inorganic fillers for modification of film properties such as coefficient of thermal expansion(CTE) and tensile strength were formulated for improved electrical and mechanical properties of ACF interconnection. The thermal fatigue life of ACA/F flip chip on organic board limited by the thermal expansion mismatch between the chip and the board could be increased by a modified ACA/F. Three ACF materials with different CTE values were prepared and bonded between Si chip and FR-4 board for the thermal strain measurement using moire interferometry. The thermal strain of ACF interconnection layer induced by temperature excursion of $80^{\circ}C$ was decreased with decreasing CTEs of ACF materials.

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Fine-Pitch Solder on Pad Process for Microbump Interconnection

  • Bae, Hyun-Cheol;Lee, Haksun;Choi, Kwang-Seong;Eom, Yong-Sung
    • ETRI Journal
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    • v.35 no.6
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    • pp.1152-1155
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    • 2013
  • A cost-effective and simple solder on pad (SoP) process is proposed for a fine-pitch microbump interconnection. A novel solder bump maker (SBM) material is applied to form a 60-${\mu}m$ pitch SoP. SBM, which is composed of ternary Sn3.0Ag0.5Cu (SAC305) solder powder and a polymer resin, is a paste material used to perform a fine-pitch SoP through a screen printing method. By optimizing the volumetric ratio of the resin, deoxidizing agent, and SAC305 solder powder, the oxide layers on the solder powder and Cu pads are successfully removed during the bumping process without additional treatment or equipment. Test vehicles with a daisy chain pattern are fabricated to develop the fine-pitch SoP process and evaluate the fine-pitch interconnection. The fabricated Si chip has 6,724 bumps with a 45-${\mu}m$ diameter and 60-${\mu}m$ pitch. The chip is flip chip bonded with a Si substrate using an underfill material with fluxing features. Using the fluxing underfill material is advantageous since it eliminates the flux cleaning process and capillary flow process of the underfill. The optimized bonding process is validated through an electrical characterization of the daisy chain pattern. This work is the first report on a successful operation of a fine-pitch SoP and microbump interconnection using a screen printing process.

Optical Packaging and Interconnection Technology (광 패키징 및 인터커넥션 기술)

  • Kim, Dong Min;Ryu, Jin Hwa;Jeong, Myung Yung
    • Journal of the Microelectronics and Packaging Society
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    • v.19 no.4
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    • pp.13-18
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    • 2012
  • By the need for high-speed data transmission in PCB, the studies on the optical PCB has been conducted with optical interconnection and its packaging technology. Particularly, the polymer-based optical interconnection has been extensively studied with the advantages such as cost-effective and ease of process. For high-efficiency and passive alignment, the studies were performed using the 45 degree mirrors, MT connector, and etc. In this work, integrated PLC device and fiber alignment array block was fabricated by using imprint technology to solve the alignment and array problem of optical device and the optical fiber. The fabricated integrated block for optical interconnection of PLC device has achieved higher precision of decreasing the dimensional error of the patterns by optimization of process and its insertion loss has an average value of 4.03dB, lower than criteria specified by international standard. In addition, a optical waveguide with built-in lens has been proposed for high-efficiency and passive alignment. By simulation, it was confirmed that the proposed structure has higher coupling efficiency than conventional no-lens structure and has the broad tolerance for the spatial offset of optical waveguide.